Physical-Based Threshold Voltage and Mobility Models Including Shallow Trench Isolation Stress Effect on nMOSFETs

Abstract

Physical-based threshold voltage and channel mobility models to include shallow trench isolation (STI) mechanical stress effects on MOSFET I-V characteristics were described. The parameter Δs, meaning the change along the MOSFET channel length under STI stress, ΔE eceg , ΔE dos , and ΔE m , meaning the activation energy per strain due to STI stress are used in models. ΔE eceg describes the STI-stress-induced electron affinity, bandgap narrowing effects. ΔE dos describes density-of-states changes due to the light and heavy hole mass changes under STI stress, and ΔE m corresponds to the STI-stress-induced mobility changes. The STI stress induced tens of millivolts shifts in threshold voltage, and 40% shift in channel mobility on nano-MOSFET region. The models are verified by the 130-nm technology nMOSFET-layoutdependent experiment data including various gate length, active area, and gate location.

Implications of Small Geometry Effects on <inline-formula> <tex-math notation="LaTeX">$g_m/I_D$ </tex-math> </inline-formula> Based Design Methodology for Analog Circuits

“…2) STI Induced Stress: The STI induced stress is caused by the difference between the thermal expansion coefficients of the silicon and the STI oxide [6] and can be resolved into a longitudinal component along L (S l ) and a transversal component along W (S t ) [7]. It affects the carrier transport properties and produces a fractional change in mobility…”