Photoinduced Synaptic Behavior of In_xTi_yO Thin Film Transistors

Abstract

Herein, InxTiyO films are successfully deposited via the atomic layer deposition method, which involves sub‐cycles of In2O3 and TiO2 application at a growth temperature of 200 °C. InxTiyO films are an excellent alternative to In2O3 films for use in channels of thin film transistors (TFTs), and can be used to avoid issues such as metal‐like conduction characteristics and undesirable negative shifts. Adjusting the addition of TiO2 to In2O3 enables modulation of the cut‐off wavelength in the UV region. However, the addition of TiO2 adversely affects the on‐current level. The TiO2 content in the InxTiyO films is optimized based on photosensitivity and current level, wherein the films are used as the channel layer in photo‐TFTs; consequently, a photo‐synaptic behavior is achieved. The InxTiyO film‐based memory devices are programmed and erased using UV light and gate voltage, respectively, wherein deep trap sites at the interface between the InTiO and Al2O3 layers facilitate the retention of charge during memory operation. The memory on/off ratio deteriorates slightly with a lapse in retention time of 4 × 104 s after 20 program/erase (P/E) cycles. Moreover, in the InxTiyO‐based TFTs, excellent linearity is achieved during potentiation due to a good photo‐synaptic behavior.

Synaptic Transistors Exhibiting Gate-Pulse-Driven, Metal-Semiconductor Transition of Conduction

“…When a positive gate voltage is applied, the holes inside the CID move toward the interface and are trapped by the trap sites of the interface, thereby inducing electrons in the channel and increasing the channel current. These charge traps can be identified by observing the hysteresis of the transfer curve, which has been reported in our previous works as well [20][21][22]. Therefore, the conductivity of the channel increases rapidly, which causes a change in the conduction phase.…”

“…A schematic of the proposed three-terminal device, comprising a gate, source/drain electrodes, TiO 2 channel layer, and CID, that inherently functions as a gate insulator, is illustrated in Figure 1. As reported previously, the trap states were located at the interface between the channel layer and the CID [20][21][22]. In this study, SiO 2+δ grown by plasmaenhanced atomic layer deposition (PEALD) was used as the CID.…”

“…In our previous studies, we proposed oxide-FETbased, non-volatile memory devices with highly reproducible memory operations [20,21]. The devices proposed in the current study also exhibit a shift in the threshold voltage with respect to the incident optical pulse, and offer the selective removal of shallow traps by H 2 plasma treatment, which improves their operation stability [20,22]. Furthermore, we leverage the MST properties for the fabrication of a transparent device that performs synaptic behaviors.…”

Replicating the Bright-Light Therapy of Seasonal Affective Disorder Using Dual-Gate Dielectric Synaptic Transistors: An Exploration of Neuromorphic Computing Approaches

“…Our research group has focused on photosensitive field-effect transistors that feature stable, deep interfacial traps. For instance, our synaptic devices can be programmed using ultraviolet (UV) optical stimulation, harnessing the deep traps at the interface between the channel and gate dielectric layers. ,− Moreover, the developed synaptic transistors have demonstrated CMOS compatibility and used oxide semiconductors and dielectric materials conducive to fabrication using vacuum-based thin-film deposition techniques, favoring mass production.…”

Recent Progress in Organic-Based Photonic Synapses

“…To implement photonic synaptic devices, various materials have been applied, including metal oxides [11][12][13][14][15][16], low-dimensional materials [17][18][19][20], and perovskites [21][22][23][24]. In particular, organic materials have Fig.…”