Photoelectric Laser Stimulation applied to Latch-Up phenomenon and localization of parasitic transistors in an industrial failure analysis laboratory

Llido, R.; Gomez, Jorge; Goubier, V.; Froidevaux, Nicolas; Dufayard, L.; Haller, G.; Pouget, Vincent; Lewis, Dean

doi:10.1016/j.microrel.2011.06.050

Cited by 6 publications

(2 citation statements)

References 6 publications

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“…In the presence of defects or in electric modes in limit of functionality, the very weak electric variations led by the laser stimulation are going to be able to modify the functionality of the integrated circuit, allowing the localization of these sensitive zones. It will also enable to localize sources of Latch-Up triggering [12], or advance/delay of CMOS gates [13]. Future work characterizing PLS effect on a PMOS transistor under PLS should be led.…”

Section: Discussionmentioning

confidence: 99%

Characterization and TCAD simulation of 90 nm technology transistors under continous photoelectric laser stimulation for failure analysis improvement

Llido

Sarafianos

Gagliano

et al. 2012

2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

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This study is driven by the need analysis methodologies based on laser/silicon the functional response of an integrated cir stimulation. It is therefore mandatory to under of elementary devices to laser illumination, in predict the behavior of more complex cir characterizes and analyses photoelectric effect 1064 nm wavelength laser on a 90 nm transistor. Comparisons between photocurren channel transistor, or in function of its sta presented. Experimental measurements are c Elements Modeling Technology Computer Aid analyses, which gives a physical insight of carr transport in the devices.

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Section: Discussionmentioning

confidence: 99%

Characterization and TCAD simulation of 90 nm technology transistors under continous photoelectric laser stimulation for failure analysis improvement

Llido

Sarafianos

Gagliano

et al. 2012

2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

Self Cite

View full text Add to dashboard Cite

show abstract

“…This way, in presence of defects or if the product is in a state in limit of functionality, the very weak electric variations led by the laser stimulation will be able to modify the functionality of the integrated circuit, allowing the localization of sensitive zones. It will be possible to localize for example sources of Latch-Up triggering [13], or advance/delay of CMOS gates[ 14 15]. Finally, based on this study we developed an ELDO model (based on SPICE language) of a PMOS transistor submitted to PLS, that fit very well measurements.…”

Section: Discussionmentioning

confidence: 99%

Characterization and TCAD Simulation of 90nm Technology PMOS Transistor under Continuous Photoelectric Laser Stimulation for Failure Analysis Improvement

Llido

Sarafianos

Gagliano

et al. 2012

International Symposium for Testing and Failure Analysis

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This study responds to our need to optimize failure analysis methodologies based on laser/silicon interactions, using the functional response of an integrated circuit to local laser stimulation. Thus it is mandatory to understand the behavior of elementary devices under laser stimulation, in order to model and anticipate the behavior of more complex circuits. This paper characterizes and analyses effects induced by a static photoelectric laser on a 90 nm technology PMOS transistor. Comparisons between currents induced in short or long channel transistors for both ON and OFF states are made. Experimental measurements are correlated to Finite Elements Modeling Technology Computer Aided Design (TCAD) analyses. These physical simulations give a physical insight of carriers generation and charge transport phenomena in the devices.

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The transient analysis of latch-up in CMOS transmission gate induced by laser

Qiu¹,

Cheng²,

Wang³

et al. 2014

Microelectronics Reliability

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Photoelectric Laser Stimulation applied to Latch-Up phenomenon and localization of parasitic transistors in an industrial failure analysis laboratory

Cited by 6 publications

References 6 publications

Characterization and TCAD simulation of 90 nm technology transistors under continous photoelectric laser stimulation for failure analysis improvement

Characterization and TCAD simulation of 90 nm technology transistors under continous photoelectric laser stimulation for failure analysis improvement

Characterization and TCAD Simulation of 90nm Technology PMOS Transistor under Continuous Photoelectric Laser Stimulation for Failure Analysis Improvement

The transient analysis of latch-up in CMOS transmission gate induced by laser

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