Photocurrent Response in Ambipolar Transistors Based on Single Laterally Stacked Crystals: The Role of Charge Trapping and Release

Self Cite

Most organic thin film‐based phototransistors exhibit an increase in current under illumination owing to the trapped photogenerated minority charge carriers, which enhance the accumulation of majority carriers in the semiconductor layer of the device. Recent research reveals that, on employing a unique active layer structure, phototransistor devices exhibit abnormal photoresponse behaviors under certain conditions: hole‐dominated current decreases under illumination and shows an anomalous dependence on irradiance. The current decreases with increasing irradiance. When the irradiance is increased further, a moderate current increase is observed. Under a constant negative bias, when a discrete light pulse is turned on, the current decreases sharply and then slowly increases to saturation in the beginning and it starts to increase when illumination is ceased. These anomalies are analyzed, and the changes in current are modeled using a mathematical model based on the simultaneous trapping and release of both photogenerated holes and electrons.

I_{DS} = \frac{W C_{normali}}{2 L} μ {(V_{GS} - V_{Th})}^{2}

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

I_{DS}^{1 / 2} (t) = I_{\infty}^{1 / 2} + C_{normald} \exp (- \frac{t}{τ_{normald}}) + C_{normals} \exp (- \frac{t}{τ_{normals}})

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Anomalous Current Decrease Under Illumination in Ambipolar Phototransistors Based on PTCDI‐C₅ Crystals Embedded in C₈‐BTBT Thin Film

Tarsoly

Choi

You

et al. 2021

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Procedure Optimization for Organic Ambipolar Transistor: Laterally Aligned Micro n‐/p‐Channels via Dry Soft‐Lithographic Process

Park

2021

In spite of the large potential of ambipolar transistors constituted of laterally aligned unipolar n‐/p‐channel semiconductors, it is hard to secure the full electrical performance of each semiconductor channel by the risk of intermixing which leads to low crystallinity. Here, a novel fabrication process of patterned taping is proposed which ensures the formation of sharp interface and thus preserving the original performance of individual channels—laterally aligned micro n‐/p‐channels via all‐dry soft‐lithographic process. Different from other bi‐component active layer devices, such as vertically stacked n‐/p‐bilayer and n‐/p‐blend film, laterally aligned n‐/p‐channel of this work secures clear ambipolarity because both the n‐/p‐channels are directly laid over a common gate dielectric surface. Essentially, laterally aligned n‐/p‐channels constructed by patterned taping are free from lateral channel mixing or broadening effect different from other processes such as wet‐processing and fine metal mask (FMM) patterning. In this work, a novel patterned taping method of laterally aligned n‐/p‐channel transistors and also their optimized transistor performances compared with other bi‐component devices using the same set of n‐ and p‐type semiconductor materials is demonstrated.

Tunneling‐Effect‐Boosted Interfacial Charge Trapping toward Photo‐Organic Transistor Memory

Wei

Prakoso

et al. 2022

Controlling exciton dynamics at organic semiconductor interfaces is of fundamental and practical importance, for example, in an organic field‐effect transistor (OFET) photomemory that possesses multifunctional applications. Moreover, the intrinsic properties of embedded charge storage layer may limit the device performances. This report introduces a concept of tunneling‐effect‐assisted interfacial charge trapping and takes full benefit of inherent rich surface traps of dielectrics for OFET photomemory. By controlling the thickness of barrier interlayer between active channel and dielectric, the trapped charge injection and dissipation can be regulated precisely. As a result, excellent transistor characteristics display an inconspicuous threshold voltage shift and hysteresis in dark or light exposure, while the same device can exhibit an outstanding memory behavior upon a gate bias pulse in bright situation. Without any additional materials handling such as photoactive charge storage layer into the construction, it can promise a low‐cost, facile, and versatile device fabrication.