Phased array radar cost reduction through the use of commercial RF systems on a chip

Fagan, Rory; Robey, F.C.; Miller, Luke

doi:10.1109/radar.2018.8378686

Cited by 16 publications

(5 citation statements)

References 5 publications

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“…The possible benefits provided by the use of RFSoC devices to phased array radar digitisation and processing is starting to be recognised. Fagan et al [10] report on a project which had early access to RFSoC and paired it with a 64 element S-band phased array antenna. The S-band antenna outputs were down-mixed due to the pre-production RFSoC having much lower sample rates than are available in the current commercial versions.…”

Section: Introductionmentioning

confidence: 99%

Modular Multi-Channel RFSoC System Expansion and Array Design

Peters

Horne

Amiri

et al. 2023

2023 IEEE Radar Conference (RadarConf23)

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Radio Frequency (RF) sensors are often designed to operate in a single mode or configuration. Demands coming from operating in future challenging Electromagnetic Environment (EM) conditions require innovative solutions and significant changes from current radar architectures. This paper provides a system level review of a modular multi-function RF sensor solution which allows for a N node solution which can be either used to drive a singular powerful array solution OR deployed as N multistatic RF sensor nodes. Both solutions use a common digital solution which is based on the Xilinx Radio Frequency System on a Chip (RFSoC) technology. An antenna array operating at C-band has been designed for the project, along with daughter-boards which facilitate access to all 8 receive channels from the Xilinx ZCU111 RFSoC development board. A solution to the challenges of synchronising the ADC channels (including across multiple ZCU111 boards) is also presented, with results showing the synchronisation performance.

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Section: Introductionmentioning

confidence: 99%

Modular Multi-Channel RFSoC System Expansion and Array Design

Peters

Horne

Amiri

et al. 2023

2023 IEEE Radar Conference (RadarConf23)

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“…This combination is a real enabler for many different devices and has therefore seen its rise in interest from the RF sensing research and development community. For example, the RFSoC was proposed as a suitable digital back-end solution for an active radar within [7]. Its advanced capabilities come at the cost of added complexity and challenging requirements on the broad range of technical skills required to develop on the RFSoC compared to some other solutions which provide template or simpler interfaces in order to control and develop on them.…”

Section: Introductionmentioning

confidence: 99%

Joint Active Passive Sensing using a Radio Frequency System-on-a-Chip based sensor

Ritchie

Peters

Horne

2022

2022 23rd International Radar Symposium (IRS)

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In this paper we present a dual active and passive radar experimental setup that uses the UCL ARESTOR platform. This is a multi-role RF sensor based on a Xilinx Radio Frequency System on a Chip (RFSoC) device. The system is capable of operating as an active radar, passive radar and wideband electronic surveillance receiver. Experimental results are shown that leverage 2.4 GHz passive radar experiments along with a 5.8 GHz active radar mode that are operating simultaneously observing a target of interest. Details of a bespoke designed RF front-end to access higher frequency bands are included within the paper as well as information on processing pipelines developed within the Field Programmable Gate Array (FPGA). Comparison of the target signature and how both modes could be best utilised are analysed and discussed. The target of interest within this paper is a person walking while being sensing by both modes simultaneously.

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“…By integrating the converters inside the SoC, it is possible to avoid this interface, improving power consumption and reducing the component footprint. For instance, Vivekanandan, et al [29] reported a footprint reduction of 50% and power reduction of 75% while Fagan, et al [30] showed a 6× power improvement when adopting the RFSoC over traditional FPGA and analog-todigital converter (ADC) typologies. The improvement in power consumption and footprint from combining the data converters with an FPGA and SoC enables higher operating frequencies for phased-array systems due to a smaller achievable lattice, previously precluded by the prohibitively high thermal and component densities of the distributed architecture.…”

Section: Introductionmentioning

confidence: 99%

“…The latter is especially evident, as traditional analog up/down conversion circuits are not needed for radar systems in the S-band owing to the multigigasample RF data converters, which enable direct sampling of incident waveforms. Other researchers have been exploring RFSoC technology for next-generation radar applications, and recent breakthroughs include bistatic radar [31], phased-array cost reduction [30], data reduction for digital apertures [5], near-field calibration [2], real-time signal generation [32], or fully digital radar system development [6].…”

Section: Introductionmentioning

confidence: 99%

Least-Squares Equalizer Demonstrations Using a Full-Digital Bandwidth Sub-Nyquist-Sampled Wideband Beamformer on an RFSoC

Steiner

Yeary

2022

IEEE Trans. Aerosp. Electron. Syst.

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The radio frequency system-on-a-chip (RFSoC) has recently become a viable candidate for completely replacing traditional analog and digital front ends, facilitating the development of wideband phased-array systems where the modern-day RFSoC takes the comprehensive, dominate role in the architecture of the array. Wideband phased-array systems require high-fidelity compensation techniques capable of correcting imbalanced and dispersive channel effects for effective beamforming. This article provides solutions to these challenges by designing a wideband equalizer for a sub-Nyquist-sampled 1.6-GHz S-band phased-array system implemented on a Xilinx 8channel RFSoC, whose analog-to-digital converters (ADC) operate at 4 gigasamples per second. In brief, an RFSoC is a unique, state-of-theart, highly integrated device that incorporates a field programmable gate array, high-speed ADCs and digital-to-analog converters with a system-on-a-chip architecture on a single monolithic device. By definition, true time delay beamsteering can be implemented digitally via a combination of integer-sample delays and fractional-sample delay finite impulse response filters. By modifying the filter structure of the fractional-sample delay filter bank to support complex Manuscript

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Phased array radar cost reduction through the use of commercial RF systems on a chip

Cited by 16 publications

References 5 publications

Modular Multi-Channel RFSoC System Expansion and Array Design

Modular Multi-Channel RFSoC System Expansion and Array Design

Joint Active Passive Sensing using a Radio Frequency System-on-a-Chip based sensor

Least-Squares Equalizer Demonstrations Using a Full-Digital Bandwidth Sub-Nyquist-Sampled Wideband Beamformer on an RFSoC

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