Phase-Locked and Frequency Feedback Systems

Klapper, Jacob A.; Frankle, John T.; Atkinson, P.

doi:10.1109/tsmc.1979.4310244

Cited by 24 publications

(11 citation statements)

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“…More details about the implementation and envelopes are presented in our previous work [21]. To analyze this FDL, let us consider its baseband equivalent circuit [14] presented in Fig. 5.…”

Section: Fdl Design Parametersmentioning

confidence: 99%

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Improved Auditory-Inspired Signal Processing Algorithm Design for Tracking Multiple Frequency Components

2020

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An adaptive synchrony capture filterbank (SCFB) signal processing architecture for tracking signal frequency components was proposed in a previous paper. Detailed analysis and further improvements are presented here. The original SCFB signal processing architecture consisted of a fixed array of traditional, passive linear, gammatone filters in cascade with a bank of three adaptively tunable bandpass filters that form part of a frequency discriminator loop (FDL). The SCFB exhibits many desirable properties for processing speech, music, and other complex sounds. In this article, an improved SCFB architecture is presented along with detailed specification of parameters that yield better frequency tracking. This architecture combines a FDL with a phase-locked loop, a concept borrowed from communication systems, to acquire and track frequency components in a time-varying signal. This modified algorithm estimates frequencies with higher accuracy even in the presence of closely spaced tones in the input. The improved performance of the algorithm is demonstrated by comparing the mean square error in the frequency estimates of synthetic time-varying signals.

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“…More details about the implementation and envelopes are presented in our previous work [21]. To analyze this FDL, let us consider its baseband equivalent circuit [14] presented in Fig. 5.…”

Section: Fdl Design Parametersmentioning

confidence: 99%

“…Often in loop design, the equivalent noise bandwidth ( B n ) of the loop is used as a design parameter and is defined as [9,14]: B n has been analytically calculated for system functions up to order 4 in [14] (page 21). For a second-order system, it is given by:…”

Section: Fdl Design Parametersmentioning

confidence: 99%

Improved Auditory-Inspired Signal Processing Algorithm Design for Tracking Multiple Frequency Components

2020

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“…The balanced type suppresses one of the input signals, while the doubly balanced type is used when suppression of both input signals is desired. For the mode of operation, with one of two input signals having a much larger amplitude than the other, both the balanced and the doubly-balanced circuits have the same, essentially sinusoidal, input-output relationship [6]. The characteristics of the four PDs types are sinusoidal, triangular, sawtooth and sawtooth with full frequency range, respectively.…”

Section: Phase Detector (Pd)mentioning

confidence: 99%

“…The received multipath signal is a superposition of the direct signal and other unwanted reflected GADALLAH, EI-Sayed A. Ph.D., Radar and Guidance Department, Military Technical College Proceedings of the rd ICEENG Conference, 23-25 Nov. 1999 2 -1 frequency of the VCO output, sin(c) is often called S-curve. The output of the detector is low pass filtered and provides the control signal that is used to change the frequency of the VCO, for more details about PLL see e.g., [1,6]. The multipath effect has no clue to prove its existence on the incoming signal.…”

Section: Introductionmentioning

confidence: 99%

Phase-Locked Loop Design for Multipath Mitigation

Gadallah

1999

The International Conference on Electrical Engineering

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This paper introduces a new design of Phase-Locked Loop (PLL) that makes receivers with spread spectrum techniques able to work properly in an environment of multipath effect while the receivers with standard PLL is disabled. Basically multipath effect is an inevitable error that can not be removed from the received signal even with the use of a large process gain. The multipath has a dominant effect because the statistical model differs for each possible receiver location. An investigation of both the standard PLL and the new PLL is introduced. A mathematical approach of the new PLL is presented. Simulation results for both the standard and the new PLL are given. The paper is terminated with conclusions and future work.

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“…Similarly, the jitter can be measured between the edges of digital data and recovered clock, respectively (clock-todata jitter). of the PLL in the presence of noise [6,36,58] are very important for correct bit detection. The PLL bandwidth which is necessary for clock recovery at N = 1 is about 3 kHz.…”

Section: Clock Recovery and Associated Circuitsmentioning

confidence: 99%

The CD-ROM Drive

Stan

1998

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Phase-Locked and Frequency Feedback Systems

Cited by 24 publications

References 0 publications

Improved Auditory-Inspired Signal Processing Algorithm Design for Tracking Multiple Frequency Components

Improved Auditory-Inspired Signal Processing Algorithm Design for Tracking Multiple Frequency Components

Phase-Locked Loop Design for Multipath Mitigation

The CD-ROM Drive

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