Phase Coherent Frequency Hopping in Direct Digital Synthesizers and Phase Locked Loops

Turner, S.E.; Cali, Joseph

doi:10.1109/tcsi.2020.2972368

Cited by 6 publications

(1 citation statement)

References 4 publications

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“…Many researches on FH time and FH speed have been carried out [1][2][3][4][5][6][7][8][9]. The circuit architectures to increase the hopping speed mainly include Direct Digital Synthesizer (DDS), DDS+PLL, dual-path PLL, etc [10][11][12][13][14]. DDS has short FH time, but poor spurious performance and low output frequency.…”

Section: Introductionmentioning

confidence: 99%

A method to shorten the frequency hopping time of fractional-N phase-locked loop

Fang¹,

Zhang²,

Xue³

et al. 2022

IEICE Electron. Express

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This paper proposes a frequency hopping method of multiple insertions of frequency points (MIFP) to shorten the lock time of fractional-N Phase-locked loop (PLL) in the large frequency hopping (FH) interval mode. Several frequency points between initial frequency and desired-frequency are inserted to steer the frequency up or down (multiple small FH step instead of direct large FH interval), which can ensure that the response processes are linear under-damped. The transient response process of PLL is theoretically analyzed and the feasibility of this method is verified by simulation. Moreover, this method is applied on radar local oscillators (LOs). Measurements show that 8us of the frequency hopping time can be reduced by using MIFP method compared with traditional direct frequency hopping from 2.0 GHz to 2.8 GHz with the loop bandwidth of 200 kHz.

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