It is imperative that quantum computing devices perform floating-point arithmetic operations. This paper presents a circuit design for floating-point square root operations designed using classical Babylonian algorithm. The proposed Babylonian square root, is accomplished using Clifford+T operations. This work focuses on realizing the square root circuit by employing the bit Restoring and bit Non-restoring division algorithms as two different approaches. The multiplier of the proposed circuit uses an improved structure of Toom-cook 2.5 multiplier by optimizing the T-gate count of the multiplier. It is determined from the analysis that the proposed square root circuit employing slow-division algorithms results in a T-count reduction of 80.51% and 72.65% over the existing work. The proposed circuit saves a significant number of ancillary qubits, resulting in a qubit cost savings of 61.67 % When compared to the existing work.