Performance of MD-Algorithms on Hybrid Systems-on-Chip Nvidia Tegra K1 & X1

A software stack for next-generation automotive systems on many-core heterogeneous platforms

“…Hercules targets heterogeneous architectures, featuring a "traditional" highperformance host core (such as 64-bit ARM Cortex-A or Intel iX ) and a manycore accelerator, such as GPUs [20], possibly also coupled with FPGA logic [21].…”

“…Since the two subsets of cores share the on-chip Hercules will employ a Heterogeneous Multi-Processing (HMP) model, which allows concurrently exploiting all physical cores at once, as opposite to the "traditional" clustered switching model, where only one subsystem is active at each time. Tegra [20] is a family of NVIDIA SoCs explicitly targeting embedded systems such as tablets and smartphones. Figure 3 shows that.…”

“…Poorly parallelizable, control-based and I/O computations are typically executed on the host subsystem, while highly parallel workloads are offloaded to the power-efficient many-core accelerator. The latest release of the family is the Tegra X1 [20] platform that embeds an octa-core host with Big.LITTLE configuration and a Maxwell GPU with 256 CUDA cores. The platform is claimed to achieve 1 TFLOP of computing power, within only 15 Watts.…”

GPU-accelerated molecular dynamics: State-of-art software performance and porting from Nvidia CUDA to AMD HIP

“…It would be extremely beneficial to use the software that provides the best performance on the given hardware for the mathematical model considered. It is known that applied algorithms use only a fraction of peak performance and this fraction is usually less for hybrid architectures (Nikolskii et al, 2016; Rojek et al, 2016; Smirnov and Stegailov, 2016; Tchipev et al, 2019). Of course, it is implied that the results of calculations should be reproducible.…”