Performance of an Analog ASIC Developed for X-ray CCD Camera Readout System Onboard Astronomical Satellite

Abstract

We present the performance and radiation tolerance of an analog application-specified integrated circuit (ASIC) developed for the engineering model of X-ray charge-coupled device (CCD) camera onboard the next Japanese astronomical satellite. The ASIC has four identical channels and each of them equips a pre-amplifier and two 16 analog-to-digital converters. The 3 mm square bare chip has been packaged into the 15 mm square quad flat plastic. The front-end electronics test proved its power consumption to be 71 mW for the whole chip at the readout pixel rate of 20 kHz. The equivalent input noise was 32 8 0 3 V and the integrated non-linearity was 0.2% throughout its dynamic range of 20 mV. At the integrated test with an X-ray CCD, we put an identical signal to all of four channels and took the average of their outputs. Then the noise performance improved to be 17 9 0 3 V and the energy resolution of Mn K line from 55 Fe reached down to 135 3 eV (full-width at half-maximum). In order to investigate the radiation tolerance against the total ionizing dose effect, the ASIC was irradiated with 200 MeV proton beam at HIMAC/NIRS in Japan. There was no significant degradation of gain and noise performance until the absorbed dose amounted up to 15 krd, which corresponds to 10 years in the planned low earth orbit (LEO). Although the noise suddenly increased at 15 krd, there was no significant increase of the current in the chip and the performance recovered after the annealing at the room temperature for three months. This suggests that the degradation during the test was caused by temporal charge trapping near or at the interface of SiO 2 and Si bulk. Considering that the typical mission lifetime of X-ray astronomical satellites is 10 years, we proved that our ASIC has sufficient radiation tolerance for the use in the LEO.Index Terms-CMOS analog integrated circuits, 16 modulation, total ionizing dose effect, x-ray charge-coupled device (CCD). Fig. 1. Mask layout of MD01 with a size of 3 mm square. It was made through the 0.35 m CMOS process of TSMC. Four identical channels are positioned in vertical direction and they process the signals from an X-ray CCD simultaneously.

A Fully Integrated 0.055% INL X-ray CCD Readout ASIC with Incremental <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma {\text{ADC}}$</tex-math> </inline-formula>

“…To make full use of ADC's input dynamic range, a square waveform (V DAC ) generated by a DAC is added to shift up the voltages during the signaling phase. It will not affect the conversion result (V e ) of the ASIC since V DAC raises V s_dark and V s_light simultaneously [8]. The switches controlled by V clamp1,2 short the OPAs at the beginning of every pixel to offer DC operation points for them.…”

“…In CDS based circuits, it takes a significant amount of power, especially in multiple readout nodes application, to drive heavy capacitive load and it also occupies a large area, though it is efficient in removing readout noise [7]. The authors of [8] have proposed a CCD readout ASIC based on delta sigma (ΔΣ) digitization in which the CDS operation is realized in a ΔΣADC. The advantage of this technique [8]- [11] is to realize integration and CDS operation for CCD signals discretely in a ΔΣADC, which relaxes the size requirement of AFE and decreases the power consumption.…”

“…The authors of [8] have proposed a CCD readout ASIC based on delta sigma (ΔΣ) digitization in which the CDS operation is realized in a ΔΣADC. The advantage of this technique [8]- [11] is to realize integration and CDS operation for CCD signals discretely in a ΔΣADC, which relaxes the size requirement of AFE and decreases the power consumption. Furthermore, the CCD signals are sampled many times and integrated in the ΔΣADC.…”

“…It makes the noise of CCD signals be better averaged and greatly reduced. However, the linearity of the ASIC in [8] is limited and its decimation filter is too complex to be integrated on chip.…”

“…In the conventional circuits, the AFE performs the CDS operation [5], [6] and the ADC is used to digitize the results of CDS. In the ΔΣADC based ASIC, the sampling and CDS functions for CCD signals are both realized by the ΔΣADC [8]. And the AFE is only used to amplify the signals of the CCD.…”