Performance improvement of pentacene based organic field-effect transistor with HfON gate insulator

2012

Jpn. J. Appl. Phys.

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Low-voltage-operating pentacene-based organic field-effect transistors (OFETs) with different channel lengths have been fabricated by employing a room-temperature-processed HfON gate insulator. It was found that the on/off current ratio of the OFETs can be improved by decreasing the channel length. However, the hole mobility in the OFETs decreases with decreasing channel length owing to the effect of contact resistance. Interestingly, such OFETs with a short channel length (channel W/L = 500/50 µm) also show good electrical properties, such as a high hole mobility of 0.26 cm2 V-1 s-1, a low subthreshold swing of 0.13 V/decade, and a large on/off current ratio of 1×105 at an operating voltage of -2 V.

Section: Resultsmentioning

confidence: 63%

Section: Introductionmentioning

confidence: 99%

Room-Temperature Fabrication of HfON Gate Insulator for Low-Voltage-Operating Pentacene-Based Organic Field-Effect Transistors

Liao

2012

Jpn. J. Appl. Phys.

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“…Bottom-gate-type pentacenebased OFETs were fabricated on n þ -Si(100) substrates (resistivity, 1-6 m cm) with a top-contact bottom-gate device geometry. [14][15][16][17][18] First, n þ -Si(100) substrates were chemically cleaned by a sulfuric peroxide mixture (SPM) and diluted hydrofluoric acid (DHF). Next, a 0.7-nm-thick chemical oxide (C'O) layer was formed on the Si substrates by immersion in 30% H 2 O 2 solution for 60 min at room temperature to improve the interface quality.…”

Section: Methodsmentioning

confidence: 99%

Ultrathin Poly(4-vinylphenol) Interfacial Layer Evaporation for Low-Voltage Operation of Organic Field-Effect Transistors with HfO₂ Gate Insulator

Kamino

2013

Jpn. J. Appl. Phys.

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Ultrathin poly(4-vinylphenol) (PVP) layer formation by evaporation was investigated for the first time to improve the pentacene/HfO2 interface characteristics in bottom-gate organic field-effect transistors (OFETs). 3–10-nm-thick PVP layers were successfully deposited by evaporation. It was found that the surface roughness of the PVP layer was remarkably decreased at the deposition temperatures of 50–100 °C both on SiO2 and HfO2 gate insulators. The obtained relative dielectric constants of the PVP layers deposited on SiO2 and HfO2 were 3.4 and 4.8, respectively. The mobility in the fabricated pentacene-based p-type OFETs with the HfO2 gate insulator was increased from 0.25 cm2 to 0.32 cm2 V-1 s-1 at the operation voltage of 2 V by the 5-nm-thick PVP interfacial layer deposited at 50 °C.

“…[4][5][6] Currently, the p-type characteristics of pentacene have been reported in many different aspects, for example, treatment of surface, growth method, and so on. [7][8][9][10][11] However, the complementary metal-oxide-semiconductor (CMOS) FET for low-voltage operation requires both p-and n-type semiconductors. Presently, most organic semiconductors are suitable for either p-or n-type OFETs.…”

mentioning

confidence: 99%

Effect of anIn-situProcess on Electrical Properties of n-Type Pentacene-Based Metal–Oxide–Semiconductor Diodes with Yb Donor Layer

Song

2012

Appl. Phys. Express

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In order to improve the n-type characteristics of pentacene, pentacene-based metal–oxide–semiconductor (MOS) diodes with ultrathin Yb interface layers as a donor layer and Yb top contact fabricated by an in-situ process were investigated. The fabricated MOS diode showed n-type capacitance–voltage (C–V) characteristics with negligible hysteresis loop even though the accumulation capacitance was lower than that of the SiO2 gate insulator. It was also found that the characteristics of MOS diodes strongly depend on the interface properties between the Yb top contact electrode and pentacene. The excellent C–V characteristics were obtained using an in-situ annealing process at 50 °C for 1 h.