2019 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) 2019
DOI: 10.1109/mchpc49590.2019.00008
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Performance Evaluation of the Intel Optane DC Memory With Scientific Benchmarks

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Cited by 10 publications
(7 citation statements)
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“…Since the availability of DCPMM, there are some initial studies of data placement in real DRAM+DCPMM systems. Some authors studied the system performance of DCPMM [39], [56], [32], [14], and others have manually modified data placement in either mini or real applications and evaluated the performance benefits in DRAM+DCPMM systems [37], [52], [43], [29], [51], [58]. Finally, recent profiling-based proposals to guide or automate static data placement have already been implemented and evaluated with real DCPMM [9], [38].…”
Section: Tiered Page Placement With Dcpmmmentioning
confidence: 99%
“…Since the availability of DCPMM, there are some initial studies of data placement in real DRAM+DCPMM systems. Some authors studied the system performance of DCPMM [39], [56], [32], [14], and others have manually modified data placement in either mini or real applications and evaluated the performance benefits in DRAM+DCPMM systems [37], [52], [43], [29], [51], [58]. Finally, recent profiling-based proposals to guide or automate static data placement have already been implemented and evaluated with real DCPMM [9], [38].…”
Section: Tiered Page Placement With Dcpmmmentioning
confidence: 99%
“…For the Intel Optane DC Persistent DIMM, the device is integrated into the system with a DIMM-based interface, similar to DRAM devices. The system directly accesses the device using load/store requests at the byte granularity [95,106,[178][179][180][181][182][183][184]. This configuration provides a much lower access latency, on the order of hundreds of nanoseconds (around 169 ns for sequential reads [95,184]), but comes at a high cost, 5× the cost of the Intel Optane SSD in dollars-per-bit [104,185].…”
Section: Intel Optane Ssdmentioning
confidence: 99%
“…A er the recent release of PMem, initial e orts on performance characterization of the device have been started [6,8,18,23,29,30], which also motivates the performance evaluations of PMem in di erent applications, e.g. B-tree performance evaluations [20], scienti c benchmark evaluations [22], power usage evaluations [23], hybrid memory system evaluations [17], integer compression schemes [31] and some initial database workload evaluations on PMem [18]. ere are also some other initial studies on how to close the latency gap between DRAM and PMem in latency-sensitive operations [24], how to provide e cient I/O primitives with PMem [26], how to design be er page replacement policy with PMem [21] and how to e ciently provide replication mechanisms with PMem [32].…”
Section: Related Workmentioning
confidence: 99%