Performance Evaluation of Parallel Sparse Tensor Decomposition Implementations

Rolinger, Thomas B.; Simon, Tyler A.; Krieger, Christopher D.

doi:10.1109/ia3.2016.014

Cited by 5 publications

(6 citation statements)

References 11 publications

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“…This is attributed to its unusually short dimensions; the presented methods parallelize over the outer dimensions of the tensor and thus have idle threads when the outer dimension is small. This limitation has also been observed in other tensor kernels [18], and has been remedied via alternative parallel decompositions [2,25]. Exploring these alternative decompositions is left to future work.…”

Section: Resultsmentioning

confidence: 77%

Accelerating the Tucker Decomposition with Compressed Sparse Tensors

Smith

Karypis

2017

Lecture Notes in Computer Science

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The Tucker decomposition is a higher-order analogue of the singular value decomposition and is a popular method of performing analysis on multi-way data (tensors). Computing the Tucker decomposition of a sparse tensor is demanding in terms of both memory and computational resources. The primary kernel of the factorization is a chain of tensor-matrix multiplications (TTMc). State-of-the-art algorithms accelerate the underlying computations by trading off memory to memoize the intermediate results of TTMc in order to reuse them across iterations. We present an algorithm based on a compressed data structure for sparse tensors and show that many computational redundancies during TTMc can be identified and pruned without the memory overheads of memoization. In addition, our algorithm can further reduce the number of operations by exploiting an additional amount of user-specified memory. We evaluate our algorithm on a collection of real-world and synthetic datasets and demonstrate up to 20.7× speedup while using 28.5× less memory than the state-of-the-art parallel algorithm.

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Section: Resultsmentioning

confidence: 77%

Accelerating the Tucker Decomposition with Compressed Sparse Tensors

Smith

Karypis

2017

Lecture Notes in Computer Science

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“…Therefore, we can only directly compare the SPLATT results. SPLATT's average speed-up has increased by a factor of 1.14 over the previous results, largely because of the improvement on the VAST 3D data set (denoted as VAST 2015 MC 1 in Table III from [14]). The poor performance of SPLATT was due to the short third dimension of the tensor, being only two in size, which negatively affected CSF-based computations [12].…”

Section: Data Structures For Tensor Storagementioning

confidence: 80%

“…We can compare the strong scaling results in Table 2 with those in Table III from our previous work [14] to observe the recent improvements made to SPLATT. It should be noted that the ENSIGN results presented in our previous evaluation were from an entirely different implementation ENSIGN than the version that we evaluate in this paper.…”

Section: Data Structures For Tensor Storagementioning

confidence: 93%

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Performance considerations for scalable parallel tensor decomposition

Rolinger

Simon

Krieger

2019

Journal of Parallel and Distributed Computing

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“…For example, tensors used in context-aware recommendation will have many users but only a few contexts (e.g., time or location of purchase). Indeed, the recent performance evaluation by Rolinger et al [18] showed that CSF-based computation is severely impacted by tensors with short modes. Second, tiling each tensor mode to avoid synchronization faces serious scalability issues when there are many threads or many tensor modes.…”

Section: Many-core Sparse Tensor Factorizationmentioning

confidence: 99%

Sparse Tensor Factorization on Many-Core Processors with High-Bandwidth Memory

Smith

Park

Karypis

2017

2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS)

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HPC systems are increasingly used for data intensive computations which exhibit irregular memory accesses, non-uniform work distributions, large memory footprints, and high memory bandwidth demands. To address these challenging demands, HPC systems are turning to many-core architectures that feature a large number of energy-efficient cores backed by high-bandwidth memory. These features are exemplified in Intel's recent Knights Landing many-core processor (KNL), which typically has 68 cores and 16GB of on-package multi-channel DRAM (MCDRAM). This work investigates how the novel architectural features offered by KNL can be used in the context of decomposing sparse, unstructured tensors using the canonical polyadic decomposition (CPD). The CPD is used extensively to analyze large multi-way datasets arising in various areas including precision healthcare, cybersecurity, and e-commerce. Towards this end, we (i) develop problem decompositions for the CPD which are amenable to hundreds of concurrent threads while maintaining load balance and low synchronization costs; and (ii) explore the utilization of architectural features such as MCDRAM. Using one KNL processor, our algorithm achieves up to 1.8× speedup over a dual socket Intel Xeon system with 44 cores.

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Performance Evaluation of Parallel Sparse Tensor Decomposition Implementations

Cited by 5 publications

References 11 publications

Accelerating the Tucker Decomposition with Compressed Sparse Tensors

Accelerating the Tucker Decomposition with Compressed Sparse Tensors

Performance considerations for scalable parallel tensor decomposition

Sparse Tensor Factorization on Many-Core Processors with High-Bandwidth Memory

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