Performance Evaluation of Epitaxial Layer Based Gate Modulated TFET (GM-TFET)

Abstract

This paper reports the performance of an epitaxial layer (ETL) based gate modulated (GM-TFET) through 3D Technology Computer Aided Design (TCAD) simulations. The architecture utilizes effects of both vertical tunneling and lateral tunneling phenomena to improve the device performance. Attributes of the ETL, its thickness (t epi ) and doping concentration (N epi ) are varied and their impact on device electrical parameters such as transfer characteristic, output performance, subthreshold swing (SS), and threshold voltage (V T ) is highlighted. It is observed that both t epi and N epi significantly influence the different electrical parameters of the ETL based TFET architecture.

Reduction of Corner Effect in ZG-ES-TFET for Improved Electrical Performance and its Reliability Analysis in the Presence of Traps

“…In TFETs, the band-to-band-tunneling (BTBT) mechanism at S-C interface helps in reducing SCEs and achieving SS lower than fundamental limit at 300 K. 3,4 Despite of these merits, low ON-current and excessive ambipolar behavior are the two important constraints, which limit TFET's usage in IC applications. 5,6 To enhance the device performance, various techniques like lower bandgap of source material [7][8][9][10] multi-dielectric materials for gate oxide [11][12][13] multi-workfunction for gate metal [14][15][16] etc. have been introduced to the TFET structure.…”