Performance evaluation and design trade-offs for wireless network-on-chip architectures

Abstract

Massive levels of integration are making modern multicore chips all pervasive in several domains. High performance, robustness, and energy-efficiency are crucial for the widespread adoption of such platforms. Networks-on-Chip (NoCs) have emerged as communication backbones to enable a high degree of integration in multicore Systems-on-Chip (SoCs). Despite their advantages, an important performance limitation in traditional NoCs arises from planar metal interconnect-based multihop links with high latency and power consumption. This limitation can be addressed by drawing inspiration from the evolution of natural complex networks, which offer great performance-cost trade-offs. Analogous with many natural complex systems, future multicore chips are expected to be hierarchical and heterogeneous in nature as well. In this article we undertake a detailed performance evaluation for hierarchical small-world NoC architectures where the long-range communications links are established through the millimeter-wave wireless communication channels. Through architecture-space exploration in conjunction with novel power-efficient on-chip wireless link design, we demonstrate that it is possible to improve performance of conventional NoC architectures significantly without incurring high area overhead.

Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges

“…Furthermore, using body biasing methodology it is possible to improve energy efficiency without compromising the performance of high-speed analog and RF subsystems. Consequently, body biased mm-wave transceivers are capable of improving the energy efficiency of WiNoC architectures [19]. Using the above characteristics of the antennas and mm-wave transceivers, a comparative analysis of the energy dissipation per bit between the wireless and wired communication channels has been carried out in [19].…”

“…Consequently, body biased mm-wave transceivers are capable of improving the energy efficiency of WiNoC architectures [19]. Using the above characteristics of the antennas and mm-wave transceivers, a comparative analysis of the energy dissipation per bit between the wireless and wired communication channels has been carried out in [19]. The wired channels are considered to be 32 bits wide and each link of the wired channel is designed with uniformly placed and sized repeaters for optimum delay.…”

“…In a hierarchical WiNoC, several combinations of architectures for the subnets and the upper level are possible. It is shown that an upper level mesh with overlaid wireless shortcuts in conjunction with the StarRing subnets provides the best performance-overhead tradeoff for mm-wave WiNoC [19]. Hence, this architecture is considered here.…”

“…Hence, this architecture is considered here. Performance of RF-Interconnect based small world NoC (RFNoC) [19] is also presented for comparison along with a conventional mesh. RFNoC maintains the same hierarchical topology as mm-wave WiNoC with wireless communication links replaced with RF-Is.…”

“…This is because as discussed in Section II-B, mm-wave wireless shortcuts are always energy efficient compared to a wired link whenever the link length is 7 mm or more. In the small-world mm-wave WiNoC architecture, the minimum and maximum distances between the WIs communicating using the wireless channel are 7.07 and 18 mm, respectively [19]. Therefore, in the mm-wave WiNoC, using the wireless channel is always more energy efficient.…”