Performance enhancement of offset gated polysilicon thin-film transistors

Dimitriadis, C. A.; Miyasaka, Mitsutoshi

doi:10.1109/55.887473

Cited by 17 publications

(11 citation statements)

References 7 publications

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“…The variation in the transconductance was negligible with the highest and the lowest values of 4 Â 10 À6 S in ON1 and 2.7 Â 10 À6 S in ON3. These results were similar to earlier reports [12,13] for an offset length about 0.5 lm. It was proved that the longer offset region of 1 lm or more could lower the leakage.…”

Section: Resultssupporting

confidence: 93%

A novel fabrication process of a gate offset nonvolatile memory on glass and the influence of the gate offset structure on the device characteristics

Duy

Lakshminarayan²,

Jung

et al. 2011

Solid-State Electronics

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Section: Resultssupporting

confidence: 93%

A novel fabrication process of a gate offset nonvolatile memory on glass and the influence of the gate offset structure on the device characteristics

Duy

Lakshminarayan²,

Jung

et al. 2011

Solid-State Electronics

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“…Due to the high series resistance, the drain to source current, I DS , was impeded and the TFT characteristics were not as strong as expected. 10) The series resistance of the poly-Si regions under the aluminum layers would be strongly reduced if the aluminum and silicon were more thoroughly interpenetrated. By annealing the device at 350 C for 10 h, an marked improvement in the performance of the p-channel was observed.…”

Section: Comparison Of Amsd Tft and P-sd Tft Performancementioning

confidence: 99%

Investigation of Aluminum Metallized Source/Drain Thin Film Transistors Using a Self-Aligned Fabrication Process

Duy

Lee

Jung

et al. 2010

Jpn. J. Appl. Phys.

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We consider the polarization of unstable type-IIB D0-branes in the presence of a background five-form field strength. This phenomenon is studied from the point of view of the leading terms in the non-abelian Born Infeld action of the unstable D0-branes. The equations have SO(4) invariant solutions describing a non-commutative 3-sphere, which becomes a classical 3-sphere in the large-N limit. We discuss the interpretation of these solutions as spherical D3-branes. The tachyon plays a tantalizingly geometrical role in relating the fuzzy S 3 geometry to that of a fuzzy S 4 .

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“…Other problems, such as leakage reduction, and stability and reliability enhancement, have been dealt with using offset gates, lightly doped drains (LDD), gate overlapped structures, etc. [3][4][5] Unfortunately, those approaches introduce additional resistances to the devices. Besides, aluminum was recognized as a material useful for the metal-induced crystallization of poly-Si.…”

Section: Introductionmentioning

confidence: 99%

Effect of Series Resistance on Field-Effect Mobility at Varying Channel Lengths and Investigation into the Enhancement of Source/Drain Metallized Thin-Film Transistor Characteristics

Duy

Baek

Son

et al. 2011

Jpn. J. Appl. Phys.

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The degradation in device performance due to parasitic resistance along the source and drain electrodes is a serious problem in thin-film transistor fabrication. The effect of this series resistance on the field-effect mobility has been discussed and solutions for the reduction of this unexpected resistance were studied in this work. From the derivation of the drain current, it was shown that the additional resistance had a greater influence on short-channel devices. The ratio of the series resistance to the channel resistance determined the amount of degradation to the field-effect mobility. A thin-film transistor using an aluminum-metallized source/drain was suggested; it showed an improvement in comparison with the conventional doped source/drain device, with a maximum mobility of 105 cm2 V-1 s-1. However, significant degradation of the mobility in the short-channel cases exposed the limitations of the structure. By employing doping for the source/drain metallized structure the maximum mobility reached a value of 150 cm2 V-1 s-1. The decrease in the mobility caused by the channel length decrease was also improved. This study clearly explained the problem of additional resistance on the field-effect mobility of thin-film transistors and the achievements of a device using a self-aligned fabrication process with metallized electrodes.

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Performance enhancement of offset gated polysilicon thin-film transistors

Cited by 17 publications

References 7 publications

A novel fabrication process of a gate offset nonvolatile memory on glass and the influence of the gate offset structure on the device characteristics

A novel fabrication process of a gate offset nonvolatile memory on glass and the influence of the gate offset structure on the device characteristics

Investigation of Aluminum Metallized Source/Drain Thin Film Transistors Using a Self-Aligned Fabrication Process

Effect of Series Resistance on Field-Effect Mobility at Varying Channel Lengths and Investigation into the Enhancement of Source/Drain Metallized Thin-Film Transistor Characteristics

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