Performance Characterization of Parallel Discrete Event Simulation on Knights Landing Processor

Williams, B.W.; Ponomarev, Dmitry; Abu-Ghazaleh, Nael; Wilsey, Philip A.

doi:10.1145/3064911.3064929

Cited by 13 publications

(2 citation statements)

References 19 publications

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“…PDES scalability on many-core systems is investigated by numerous studies. The Tilera architecture is examined by Jagtap et al [23] while the authors in [6,46] investigate the scalability issues on a Xeon Phi processor. The works of [4,27] present impressive event processing rates on the Sequoia BlueGene/Q supercomputer while Perumalla et al [36] demonstrate scalability up to thousands of cores through optimizations in GVT algorithms.…”

Section: Related Workmentioning

confidence: 99%

Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation

Eker

Arafa

Badawy

et al. 2021

Proceedings of the 2021 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation

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Traditional Parallel Discrete Event Simulation (PDES) systems employ a monolithic approach for choosing their thread synchronization protocol. They either implement a Time Window-based conservative synchronization or an optimistic event processing capability based on the Time Warp synchronization. In this paper, we show that this binary choice is suboptimal and unnecessary, particularly in the realistic situation where the load distribution across the simulation domain changes over time. We thus propose a new PDES synchronization scheme, called Hybrid PDES, that dynamically switches between conservative and optimistic synchronization protocols based on the simulation run time characteristics.The primary objective of Hybrid PDES is to exploit the optimistic event processing as long as it is beneficial for the system performance and scalability. We implement Hybrid PDES in Python-and Lua-based Simian PDES engines and demonstrate up to 3X performance improvements on Intel Knights Landing and AMD EPYC processors based on the Phold, La-pdes and PPT-GPU simulation applications. CCS CONCEPTS• Computing methodologies → Massively parallel and highperformance simulations; Discrete-event simulation.

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Section: Related Workmentioning

confidence: 99%

Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation

Eker

Arafa

Badawy

et al. 2021

Proceedings of the 2021 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation

Self Cite

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“…Recent work showed that many-core CPUs can substantially accelerate Discrete Event Simulation (DES) [79,167]. A number of authors also evaluated the acceleration of various types of simulations such as fluid dynamics and seismic wave propagation using non-x86 many-cores [131,26].…”

Section: Many-core Cpusmentioning

confidence: 99%

A Survey on Agent-based Simulation Using Hardware Accelerators

et al. 2019

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Due to decelerating gains in single-core CPU performance, computationally expensive simulations are increasingly executed on highly parallel hardware platforms. Agent-based simulations, where simulated entities act with a certain degree of autonomy, frequently provide ample opportunities for parallelisation. Thus, a vast variety of approaches proposed in the literature demonstrated considerable performance gains using hardware platforms such as many-core CPUs and GPUs, merged CPU-GPU chips as well as FPGAs. Typically, a combination of techniques is required to achieve high performance for a given simulation model, putting substantial burden on modellers. To the best of our knowledge, no systematic overview of techniques for agent-based simulations on hardware accelerators has been given in the literature. To close this gap, we provide an overview and categorization of the literature according to the applied techniques. Since at the current state of research, challenges such as the partitioning of a model for execution on heterogeneous hardware are still a largely manual process, we sketch directions for future research towards automating the hardware mapping and execution. This survey targets modellers seeking an overview of suitable hardware platforms and execution techniques for a specific simulation model, as well as methodology researchers interested in potential research gaps requiring further exploration.

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