Performance-Area Improvement by Partial Reconfiguration for an Aerospace Remote Sensing Application

Cardona, Luis Andres; Agrawal, J. P.; Guo, Yang; Oliver, John; Ferrer, Carles

doi:10.1109/reconfig.2011.69

Cited by 6 publications

(2 citation statements)

References 5 publications

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“…Partial reconfiguration has been widely used in diverse applications [5][6][7] that exploit the possibility to adapt hardware modules at run-time. A common requirement when using this technique is that the switching of hardware modules should be performed with minimal time overhead.…”

Section: Related Workmentioning

confidence: 99%

AC_ICAP: A Flexible High Speed ICAP Controller

Cardona

Ferrer

2015

International Journal of Reconfigurable Computing

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The Internal Configuration Access Port (ICAP) is the core component of any dynamic partial reconfigurable system implemented in Xilinx SRAM-based Field Programmable Gate Arrays (FPGAs). We developed a new high speed ICAP controller, named AC_ICAP, completely implemented in hardware. In addition to similar solutions to accelerate the management of partial bitstreams and frames, AC_ICAP also supports run-time reconfiguration of LUTs without requiring precomputed partial bitstreams. This last characteristic was possible by performing reverse engineering on the bitstream. Besides, we adapted this hardware-based solution to provide IP cores accessible from the MicroBlaze processor. To this end, the controller was extended and three versions were implemented to evaluate its performance when connected to Peripheral Local Bus (PLB), Fast Simplex Link (FSL), and AXI interfaces of the processor. In consequence, the controller can exploit the flexibility that the processor offers but taking advantage of the hardware speed-up. It was implemented in both Virtex-5 and Kintex7 FPGAs. Results of reconfiguration time showed that run-time reconfiguration of single LUTs in Virtex-5 devices was performed in less than 5 μs which implies a speed-up of more than 380x compared to the Xilinx XPS_HWICAP controller.

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Section: Related Workmentioning

confidence: 99%

AC_ICAP: A Flexible High Speed ICAP Controller

Cardona

Ferrer

2015

International Journal of Reconfigurable Computing

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“…In recent years, the feasibility of using reconfigurable hardware is being explored in the field of aerospace and defense applications [10], [7], [1], [8]. However, using FPGAs in such applications has its own challenges since time, space, power consumption, reliability and data integrity are highly crucial factors.…”

Section: Related Workmentioning

confidence: 99%

Communication-centric design for FMC based I/O system

Bouain

Viswanathan²,

Atitallah

et al. 2014

2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)

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This paper presents a communication-centric reconfigurable design for FPGA Mezzanine Card (FMC) based I/O system dedicated to several industrial application domains. The introduction of FMC I/O standard has given a new purpose for FPGAs to be used as a communication platform. In fact, FPGAs can be used for more than just computational purpose in order to improve the system performance. Taking into account the features offered by FPGAs and FMCs, such as runtime reconfiguration and modularity, we have redefined the role of these devices to be used as a generic communication-centric platform. A new modular, runtime reconfigurable, Intellectual Property (IP)-based communication system for industrial applications has been designed. The efficiency and the performances of our platform are illustrated through a real industrial use-cases designed using a computationally intensive application and several I/O bus standards.

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