Performance and direct-coupled FET logic applications of InAlAs/InGaAs co-integrated field-effect transistors by 2-D simulation

Tsai, Jung‐Hui; Huang, Chia-Hong; Ou-Yang, Jhih-Jhong; Chao, Yi-Ting; Jhou, Jia-Cing; Wu, You-Ren

doi:10.1016/j.tsf.2012.11.142

Cited by 3 publications

(1 citation statement)

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“…Direct-coupled FET logic is well suited for noisy environments and long-distance communication. The versatility of this device is enhanced by its ability to function with diverse supply voltages across various applications [31,62,63]. In this inverter configuration, the four electrode terminals are fabricated as input gate voltage (V IN ), output voltage (V OUT ), drain voltage (V DD ), and ground (GND).…”

Section: Integrated Logic Circuits Characteristicsmentioning

confidence: 99%

Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures

Lee,

Yoon,

Hwang

et al. 2023

Nanomaterials

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Two-dimensional (2D) transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS2), stand out due to their atomically thin layered structure and exceptional electrical properties. Consequently, they could potentially become one of the main materials for future integrated high-performance logic circuits. However, the local back-gate-based MoS2 transistors on a silicon substrate can lead to the degradation of electrical characteristics. This degradation is caused by the abnormal effect of gate sidewalls, leading to non-uniform field controllability. Therefore, the buried-gate-based MoS2 transistors where the gate electrodes are embedded into the silicon substrate are fabricated. The several device parameters such as field-effect mobility, on/off current ratio, and breakdown voltage of gate dielectric are dramatically enhanced by field-effect mobility (from 0.166 to 1.08 cm2/V·s), on/off current ratio (from 4.90 × 105 to 1.52 × 107), and breakdown voltage (from 15.73 to 27.48 V) compared with a local back-gate-based MoS2 transistor, respectively. Integrated logic circuits, including inverters, NAND, NOR, AND, and OR gates, were successfully fabricated by 2-inch wafer-scale through the integration of a buried-gate MoS2 transistor array.

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Section: Integrated Logic Circuits Characteristicsmentioning

confidence: 99%