Performance Analysis of Vertical and Horizontal Transmitter Array Modules Using Short- and Long-Wavelength VCSELS for Optical Interconnects

Ukaegbu, Ikechi Augustine; Kim, Do-Won; Shirazy, Mohammed Shorab Muslim; Lee, Tae‐Woo; Cho, Mu Hee; Park, Hyo‐Hoon

doi:10.1109/tcpmt.2013.2248151

Cited by 9 publications

(3 citation statements)

References 15 publications

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“…Moreover, multicore architecture is a new trend of processor design to further improve processor performance through parallel tasks performed by the cores. The chips of these cores can be placed on a common substrate through MCM (Multi-chip Module) packaging technology [3][4][5][6].There are three main MCM technologies: MCM-C, which uses cofired multilayer ceramic substrate technology; MCM-D, which uses thin-film deposition technology and MCM-L, which uses lamination technology [7]. Among these main MCM technologies, MCM-L is widely used in microprocessor packaging industries for high volume consumer and low cost products [6].…”

Section: Introductionmentioning

confidence: 99%

Perspective Chapter: Chip I/O Design Fundamentals, Methodologies and Challenges

A. Ukaegbu,

Marzuki

2024

Industrial Engineering and Management

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The dramatic increase in processing power due to the combined effects of integrated circuit scaling and shifts in computer architectures from single core to multi-core systems has led to the highly scaled on-chip aggregate bandwidths to the Tb/s range. Consequently, this has resulted to the increase in the amount of data transfer between chips to increase overall system performance. However, due to the limited I/O pin count in chip packages and PCBs, designing efficient high-speed and low power chip I/O is important. This chapter proposes a configurable I/O driver that can be configured between two single-ended voltage-mode drivers, a differential voltage-mode driver and a differential current-mode driver to address electronic signaling mismatches between integrated circuits for 0.4–8.0Gbps applications. Four control schemes, namely, impedance, output swing, slew rate and de-emphasis control scheme, were integrated into the configurable I/O driver to improve signal integrity by addressing the ISI, output switching noise, reflections and output swing deviation. Through the supplementary control from the four digital schemes, the proposed configurable I/O driver is capable of supporting multiple signaling types while improving high-speed signal integrity, thereby enhancing the performance of computer systems for better consumer experiences.

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Section: Introductionmentioning

confidence: 99%

Perspective Chapter: Chip I/O Design Fundamentals, Methodologies and Challenges

A. Ukaegbu,

Marzuki

2024

Industrial Engineering and Management

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“…Over the years, photonic technologies and silicon photonics have been studied extensively for several applications in optical interconnects, sensing, digital photonics, and signal processing [1][2]. This is due to their numerous advantages such as the ability to realize high component density, low electromagnetic interference, reduced crosstalk, high bandwidth, and low power consumption [3]. One of the significant advantages of silicon photonics is its compatibility with silicon microelectronic process.…”

Section: Introductionmentioning

confidence: 99%

4 × 4 bit Programmable Optical Memory Array With Digital Addressing Using Micro-Ring Resonators

Nurgali,

Nakarmi,

Molardi

et al. 2024

IEEE Access

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The development of photonic integrated circuit (PIC) based computing systems requires efficient optical memory units, which can be challenging to implement due to the need for precise routing of optical signals. To address this challenge, we propose a 4x4 bit photonic non-volatile memory array system using micro ring resonators for fast and flexible memory addressing. The system uses phase change material (PCM) as a memory unit and implements wavelength division multiplexing (WDM) techniques to access memory cells through active and passive filtering by micro-ring resonators. Results show a system access speed of 30 Gbps with 50Mbps for erasing and 1.6Mbps for writing with accurate memory unit routing. This demonstration shows the potential for developing photonic non-volatile memory storage with reconfigurable memory addressing, which could facilitate the development of advanced PIC-based computing systems.

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“…Previously, a number of optical subassemblies have been researched using several alignment techniques, including 45°‐titled mirror, 90°‐bend flexible film, 90°‐bend fiber connector and direct optical‐coupling method. The 45°‐tilted mirrors and 90°‐bend fiber connector methods are able to provide 90°‐beam‐deflection and avoid the 90°‐electrical‐interconnection‐deflection, which is convenient for the interconnection between the optical chips and electrical chips. But some disadvantages still exist in these two methods.…”

Section: Introductionmentioning

confidence: 99%

Design and fabrication of a small‐form transmitter optical subassembly for 100 Gbps short reach optical interconnect

Liu

Xue

et al. 2017

Micro & Optical Tech Letters

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A high-coupling-efficiency and convenient-integration transmitter optical subassembly for 25 Gbps small-form transceiver is developed in this paper. In the structure, the VCSEL is vertically mounted on the silicon substrate by the flip-chip method to enable direct and passive alignment with the fibers plugging in the fiber guide holes on the silicon substrate. By the optical simulation, the maximum coupling efficiency of VCSEL is 20.38 dB. The vertical electrical pads of the VCSEL are connected to the horizontal wire-bonding pads on silicon substrate by the 908-bend GS micro strip lines. Thus, the interconnection between the transmitter optical subassembly and the electrical PCB board is conveniently realized by the low-cost wire-bonding method. The electrical performance of the 908-bend GS micro strip lines on the optical subassembly is also evaluated by the 3D electromagnetic simulation. In order to verify the transmission performance of the transmitter optical subassembly, it is integrated with an electrical board using bonding wires, and then the optical performance of the transmitter is measured. By the measurement, the optical subassembly can operate up to 25 Gbps per channel.optical alignment, silicon optical bench, TOSA, 100 Gbps optical interconnect | I NT RODU CTI ONWith rapid development of the high data transmission capacity, the appearance of the optical interconnection attracts great attention and becomes a potential alternative for the copper interconnection, since it has the ability of suppressing EMI and the features of low loss and high bandwidth. Currently, the optical interconnection has been applied in most places of the computing system, including long-reach and short-reach optical interconnection. Unlike the long reach systems, short-reach optical interconnection is applied in the data processing centers, consumer electronics and so on, and it mainly focuses on the reduction of the cost, power consumption and volume of the optoelectronic system. 1-3 Based on these reasons, low-cost vertical cavity surface emitting laser (VCSEL) produced at a large scale is widely applied in the short-reach optical intercommunication and the small-form transceiver is a promising optical module for the reduction of the size.The small-form optical module requires a transmitter optical subassembly focusing on the optical alignment and the integration difficulty with the electrical board. Previously, a number of optical subassemblies have been researched using several alignment techniques, including 458-titled mirror, 908-bend flexible film, 908-bend fiber connector and direct optical-coupling method. The 458-tilted mirrors 4,5 and 908-bend fiber connector 6,7 methods are able to provide 908-beam-deflection and avoid the 908-electricalinterconnection-deflection, which is convenient for the interconnection between the optical chips and electrical chips. But some disadvantages still exist in these two methods. For example, the optical coupling loss using the 458-titled mirror method is greater than 21.5 dB and hig...

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Performance Analysis of Vertical and Horizontal Transmitter Array Modules Using Short- and Long-Wavelength VCSELS for Optical Interconnects

Cited by 9 publications

References 15 publications

Perspective Chapter: Chip I/O Design Fundamentals, Methodologies and Challenges

Perspective Chapter: Chip I/O Design Fundamentals, Methodologies and Challenges

4 × 4 bit Programmable Optical Memory Array With Digital Addressing Using Micro-Ring Resonators

Design and fabrication of a small‐form transmitter optical subassembly for 100 Gbps short reach optical interconnect

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