To achieve a fair share of buffer memory among the output queues in a shared buffer ATM switch, a maximum allowable queue length (a threshold) for each queue should be set. In this paper, to analyze a transient behavior of the buffer state in such switches, we perform a discrete‐time transient analysis of a queuing model and then approximately derive time‐varying queue length distribution and cell loss probability. In numerical examples, we discuss the validity of our analytical approach by comparison with simulation results. © 2001 Scripta Technica, Electron Comm Jpn Pt 1, 84(6): 1–10, 2001