2015 IEEE 20th Conference on Emerging Technologies &Amp; Factory Automation (ETFA) 2015
DOI: 10.1109/etfa.2015.7301443
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Performance analysis of process bus communication in a Central Synchrocheck application

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Cited by 3 publications
(3 citation statements)
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“…The results in Figure 9 assume worst case network loads for the simulation, with network sizes ranging from 10 to 60 bays. Figure 9: Latencies and inter-arrival times for SV and GOOSE traffic [12] The results from Figure 9 validate that network transfer times can be assumed to be in the area of TT6 or better (600us or better in average), both for latencies for sampled values traffic, as well as GOOSE traffic up-and downstream latencies, for various network configurations consisting of HSR and PRP or point-to-point combinations.…”
Section: Impact Of the Communication Network On Performancementioning
confidence: 60%
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“…The results in Figure 9 assume worst case network loads for the simulation, with network sizes ranging from 10 to 60 bays. Figure 9: Latencies and inter-arrival times for SV and GOOSE traffic [12] The results from Figure 9 validate that network transfer times can be assumed to be in the area of TT6 or better (600us or better in average), both for latencies for sampled values traffic, as well as GOOSE traffic up-and downstream latencies, for various network configurations consisting of HSR and PRP or point-to-point combinations.…”
Section: Impact Of the Communication Network On Performancementioning
confidence: 60%
“…If we assume process bus network design following a traditional partitioning per bay and connected devices are therefore limited more or less to one bay only, we can safely assume that the maximum network transfer time delay of 600µs as demanded by TT6 can be respected with network sizes of up to 16 hops in case of HSR and up to 9 hops in case of PRP or non-redundant process bus networks. Further analysing whether the maximum transfer time delay can be kept within the defined boundaries, [12] uses the example of a central synchrocheck applicationusing samplings from merging units and issuing commands to breaker IEDsin order to assess performance aspects for other network architecture configurations according to [10] next to HSR and PRP setups. The results in Figure 9 assume worst case network loads for the simulation, with network sizes ranging from 10 to 60 bays.…”
Section: Impact Of the Communication Network On Performancementioning
confidence: 99%
“…The process bus communicates the current and voltage samples with the application layer protocol SAV (IEC 61850‐9‐2) and binary values as generic object oriented substation event (GOOSE) (IEC 61850‐8‐1) messages between the MUs and protection relays. In [7], the process bus performance is analysed in case of a centralised function such as synchrocheck and states that the tight sampled value (SV) requirements might be violated in case of a failure of the high‐availability‐seamless‐redundancy ring. Therefore reliability, speed and real‐time performance of the communication solution are of high importance.…”
Section: Related Work Of Cpc Architecturesmentioning
confidence: 99%