Performance Analysis of III-V and IV Semiconductors Based Double Gate Hetero Material Negative Capacitance TFET

Rajan, Chithraja; Paul, Omdarshan; Samajdar, Dip Prakash; Hidouri, Tarek; Nasr, Samia

doi:10.1007/s12633-022-01667-x

Cited by 7 publications

(3 citation statements)

References 32 publications

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“…A comprehensive tabular review of the performance of NC-TFETs has been provided in [22]. Some of the mentionable results are: (i) SS becomes 4 decades of current level steeper even in deep subthreshold regime [46]; (ii) an MFIS gate stacked Heterojunction NC-TFET with SiGe-InGaAs source and SiGe pocketed Si-channel and drain structure [47], yields I ON :I OFF ≈ 10 16 and SS avg = 27 mV/decade (@ 9 decades of I drain ) @V DD 0.4 V; (iii) A HfZrO 2 -SiO 2 ferro-stack Heterojunction NC-TFET with an array of III-V alloys and group IV materials exhibit I ON :I OFF ≈ 1.95 × 10 13 , V th = 0.41 V, SS = 12.2 mV/dec, g m = 47.7μS and f T = 4.89 GHz @ VDD = 0.5 V [48]. The NC-TFETs when integrated in different digital circuits like inverter, mux, adders exhibit improved output characteristics and delay parameters [47].…”

Section: Negative Capacitance Fets-boosting Gaafets Tfets and Finfetsmentioning

confidence: 99%

More-than-moore steep slope devices for higher frequency switching applications: a designer’s perspective

Chowdhury,

Sarkar,

Mahapatra

et al. 2024

Phys. Scr.

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The progress in IC miniaturization dictated by Moore’s Law has taken a leap from mere circuit integration to IoT enabled System-on-Chip (SoC) deployments. Such systems are connoted by contemporary advancements in the semiconductor industry roadmaps namely, ‘More-Moore’ and ‘More-than-Moore’ (MtM). For meaningful integration of digital and non-digital blocks, a power performance tradeoff is essential for maximum and fruitful utilization of the silicon area. Using the techniques under the MtM nomenclature allows the use of unconventional steep slope devices like Tunneling FETs, Negative Capacitance (NC) FETs, Gate-all-around FETs (GAA) and FinFETs etc., which can exhibit reasonable performance with lower supply voltages. Following the Device Technology Co-optimization (DTCO) and System Technology Co optimization (STCO) the advanced 3D heterogenous integration technologies allow sensors, analog/mixed signal and passive components to be assimilated within the same package as the CMOS blocks. Appropriate device engineering techniques like multi-gate architectures, vertical stacking transistors, compound semiconductors and alternate carrier transport phenomena are required to improve the current drive and scaling performance of advanced CMOS devices. CMOS based codesign is essential to realize new topologies for energy economical computation, sensing and information processing as the beyond CMOS steep slope devices are independently incapable of replacing conventional bulk CMOS devices. This article presents a detailed qualitative review of the various aspects of MtM beyond CMOS steep slope switches and their prospective integration technologies. For system level integration, various aspects of device performance and optimizations, related device-circuit interactions, dielectric technologies at the advance nanometer nodes have been probed into. Additionally, novel circuit topologies, synthesis algorithms and processor level performance evaluation using steep slope switches have been investigated. An exclusive compact overview for contemporary insights into integrated device-system development methodology and its performance evaluation is presented.

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Section: Negative Capacitance Fets-boosting Gaafets Tfets and Finfetsmentioning

confidence: 99%

More-than-moore steep slope devices for higher frequency switching applications: a designer’s perspective

Chowdhury,

Sarkar,

Mahapatra

et al. 2024

Phys. Scr.

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“…Simulated results show close resemblance with the experimental data to confirm our model validity. The calibration procedure is almost similar as adopted in [27] for simulation, nonlocal band-to-band tunnelling (BTBT) model is used, which computes the speed of tunnelling at both the tunnelling junctions. By utilizing Shockley-Read-Hall (SRH) recombination and Auger model, the impact of leakage current and mobility are estimated.…”

Section: Device Description and Calibrationmentioning

confidence: 99%

“…Therefore, NC-TFET can be used to detect biomolecules with better sensitivity because of its high I ON and better SS as compared to conventional TFET and lower power dissipation due to low I OFF . However, it is evident from the literature review that Group III-V and IV semiconductors drastically improves TFET electrical characteristics as compared to Si-TFET [27]. Different Group III-V and IV semiconductor materials (InAs/Si, SiGe/Si) are examined to improve TFET attributes and it is found that Ge/GaAs based TFET provides exceptional I ON with low ambipolarity.…”

Section: Introductionmentioning

confidence: 99%

Ge/GaAs Based Negative Capacitance Tunnel FET Biosensor: Proposal and Sensitivity Analysis

Paul

Rajan

Samajdar

et al. 2022

Silicon

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A highly sensitive, accurate, fast and power efficient biosensor is the need of the hour. Undoubtedly, dielectrically modulated (DM) tunnel FET (TFET) assures better sensitivity as compared to MOSFET biosensors in case of label-free biosensing. However, there exists immense possibilities to upgrade TFET biosensor properties through the improvement of its DC characteristics. Therefore, in this paper a ferroelectric (FE) gate oxide and a hetero material (HM) source/drain-channel based TFET is designed for biosensor applications. A FE layer of HfZrO 2 above SiO 2 gives rise to negative capacitance (NC) effect that causes voltage amplification and hence, boosts subthreshold swing (SS) and I ON /I OFF ratio. In addition, use of a low band gap material (Ge) in source and a high band gap material (GaAs) in drain-channel junctions enhances the probability of band-to-band-tunneling (BTBT) of charge carriers. Further, to introduce biomolecules, a cavity is impinged below HfZrO 2 near SiO 2 above source/channel junction that modulates BTBT as a function of charge density (N f ) and dielectric constant (K). This paper presents a detailed comparative analysis of Ge/GaAs-NCTFET and Ge/GaAs-TFET biosensors for different K and N f values from which we can conclude that the incorporation of NC effect in TFET biosensors leads to enhanced sensitivity with high speed and low power consumption.

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Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction

Ramesh,

Choudhuri

2023

Microelectronics Journal

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Performance Analysis of III-V and IV Semiconductors Based Double Gate Hetero Material Negative Capacitance TFET

Cited by 7 publications

References 32 publications

More-than-moore steep slope devices for higher frequency switching applications: a designer’s perspective

More-than-moore steep slope devices for higher frequency switching applications: a designer’s perspective

Ge/GaAs Based Negative Capacitance Tunnel FET Biosensor: Proposal and Sensitivity Analysis

Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction

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