Performance Analysis of Fully-Depleted Silicon-On-Insulator (SOI) G 4 -FET and Gate-All-Around (GAA) MOSFETs

Alam, Rakibul; Mollah, Md. Rais Uddin; Khan, Md. Ferdous

doi:10.17148/ijireeice.2019.7301

International Journal of Innovative Research in Electrical, Ele

2019

DOI: 10.17148/ijireeice.2019.7301

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Performance Analysis of Fully-Depleted Silicon-On-Insulator (SOI) G 4 -FET and Gate-All-Around (GAA) MOSFETs

Rakibul Alam¹,

Md. Rais Uddin Mollah²,

Md. Ferdous Khan³

Abstract: The performance of fully-depleted Silicon-On-Insulator (SOI) Four Gate Transistor (G 4-FET) and Gate-All-Around (GAA) MOSFETs are investigated. Threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), maximum drain current are calculated and compared.

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Performance Analysis of Fully-Depleted Silicon-On-Insulator (SOI) G 4 -FET and Gate-All-Around (GAA) MOSFETs

Abstract: The performance of fully-depleted Silicon-On-Insulator (SOI) Four Gate Transistor (G 4-FET) and Gate-All-Around (GAA) MOSFETs are investigated. Threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), maximum drain current are calculated and compared.

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References 4 publications

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