Performance analysis of buffered crossbar switch scheduling algorithms

Prasanth, N. Narayanan; Balasubramanian, Kannan

doi:10.1504/ijics.2015.069208

Cited by 5 publications

(4 citation statements)

References 14 publications

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“…Consider Fig. 4, VOQ1 of input 1 send value pairs (1,5) to output in the request phase. Here, VOQ1 rank is 1 and length is 5.…”

Section: Enhanced 2-bit (E2b) Approachmentioning

confidence: 99%

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High Throughput Scheduling Algorithms for Input Queued Packet Switches

Devi¹,

Florinabel²,

Prasanth³

2022

Computers, Materials &Amp; Continua

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The high-performance computing paradigm needs high-speed switching fabrics to meet the heavy traffic generated by their applications. These switching fabrics are efficiently driven by the deployed scheduling algorithms. In this paper, we proposed two scheduling algorithms for input queued switches whose operations are based on ranking procedures. At first, we proposed a Simple 2-Bit (S2B) scheme which uses binary ranking procedure and queue size for scheduling the packets. Here, the Virtual Output Queue (VOQ) set with maximum number of empty queues receives higher rank than other VOQ's. Through simulation, we showed S2B has better throughput performance than Highest Ranking First (HRF) arbitration under uniform, and non-uniform traffic patterns. To further improve the throughput-delay performance, an Enhanced 2-Bit (E2B) approach is proposed. This approach adopts an integer representation for rank, which is the number of empty queues in a VOQ set. The simulation result shows E2B outperforms S2B and HRF scheduling algorithms with maximum throughput-delay performance. Furthermore, the algorithms are simulated under hotspot traffic and E2B proves to be more efficient.

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“…Consider Fig. 4, VOQ1 of input 1 send value pairs (1,5) to output in the request phase. Here, VOQ1 rank is 1 and length is 5.…”

Section: Enhanced 2-bit (E2b) Approachmentioning

confidence: 99%

“…However, a widely preferred option for these data centers is to use high-speed switches [4]. These switches can provide high-speed data transmission with maximum throughput and minimum latency on any kind of traffic [5]. As the number of compute node get increases, the traffic around the data center too increase.…”

Section: Introductionmentioning

confidence: 99%

High Throughput Scheduling Algorithms for Input Queued Packet Switches

Devi¹,

Florinabel²,

Prasanth³

2022

Computers, Materials &Amp; Continua

Self Cite

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“…To support multicasting, BCS is considered as the suitable architecture due to its scalability, flexibility, low cost and intrinsic multicast capabilities (Marsan et al, 2003;Prasanth and Balasubramanian, 2015). BCS holds buffer in the switch fabric rather than in the line cards which means the switch and buffer implemented in a single chip, thereby reducing the implementation cost .…”

Section: Multicasting In Bcsmentioning

confidence: 99%

High performance scheduler for multicast switches

Prasanth

Devi²,

Raja

2018

IJISCM

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Day-by-day, the desideratum for high speed internet connectivity increases and consequently, high performance switches are imminent. These switches require efficient schedulers to reach its maximum potential. In this paper, a high performance scheduler is proposed for buffered crossbar switches to work under multicast traffic. The scheduler is able to reduce the starvation effect and thereby achieves maximum throughput with minimum delay than existing algorithms.

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Section: Multicasting In Bcsmentioning

confidence: 99%