PEGASUS -GNSS receiver platform for safety of life user segment

Abstract

The PEGASUS receiver is a newly designed prototype for GNSS application in SoL user segment. The project is part of an Italian initiative, financed by the Italian Space Agency (Agenzia Spaziale Italiana, ASI contract ASI I/024/10/0 "Evoluzione tecnologica di un ricevitore integrato GALILEO per applicazioni Safety of Life"). The project is a technological common platform where the SoL Receiver technology is developed, integrated and tested in a real environment.

A Flexible System-on-Chip Field-Programmable Gate Array Architecture for Prototyping Experimental Global Navigation Satellite System Receivers

“…These platforms have a high degree of flexibility, but they are usually implemented using devices of considerable size and power consumption that are not portable and are not suitable for battery-powered applications. In contrast to this, some publications propose FPGA-based designs targeted at very specific applications such as GNSS in space ( [40,41]), GNSS receivers for safety-of-life [42], multi-antenna GNSS receivers [43], and ASIC design [44], among others. In general, these implementations are highly optimized for the application at hand, but they are not usually designed as a generalpurpose platform for testing and prototyping non-standard GNSS receiver algorithms.…”

“…The use of heterogeneous platforms optimizes system performance by assigning specific tasks to the most suitable processing units. 2003 [26] 2004 [33] [34] 2006 [39] 2008 [31] 2009 [27] 2010 [28] [32] [40] 2011 [11] [41,44,45] 2012 [42,43] 2013 [46] 2014 [35,36] 2015 [29] 2018 [30] 2019 [37] [48] 2020 [47] 2021 [49] 2022 [38] [50] The research outlined in this paper provides a combination of features not found in previous publications. We propose a flexible SoC-FPGA-based architecture aiming to enhance the balance between flexibility and energy efficiency.…”

Software-Defined Radio GNSS Instrumentation for Spoofing Mitigation: A Review and a Case Study

“…In terms of interference mitigation in the context of instrumentation capabilities, said SDR fits well for research extensions. Non-realtime [24], real-time [19]- [23], both [25]- [27] FPGA/DSP board [19]- [21], [25], GPPbased PVT [19]- [23], [25]- [27], host PC visuals [22]- [24], [26] FPGA accelerators [19]- [27] 2. DSP (GPP) [28]- [31] Real-time [28]- [31] DSP board [28]- [31], host PC visuals [28], [30], [31] DSP accelerators [28]- [31], bit-wise operations [29], [31] 3.…”

Software Defined Radio technology for GNSS receivers

“…The hardware parts are implemented in VHDL hardware description language, while the software processes are executed on NIOS II softcore processor implemented within the FPGA. PEGASUS [18] Integrated multi-constellation (Galileo/GPS/EGNOS) multi-frequency (L1/E1 + E5) receiver for Safety-of-Life (SoL) critical applications. Based on the classic FPGA/DSP structure, it simultaneously tracks 32 digital channels.…”