Peak thermoelectric power factor of holey silicon films

Abstract

The thermoelectric properties of nanostructured silicon are not fully understood despite their initial promise. While the anomalously low thermal conductivity has attracted much work, the impact of nanostructuring on the power factor has mostly escaped attention. While initial reports did not find any significant changes to the power factor compared to the bulk, subsequent detailed measurements on p-type silicon nanowires showed a stark reduction in the Seebeck coefficient when compared to similarly doped bulk. The reduction is consistent with the disappearance of the phonon drag contribution, due to phonon boundary scattering. Here, we report measurements on a different nanostructure, holey silicon films, to test if similar loss of phonon drag can be observed. By devising experiments where all properties are measured on the same sample, we show that though these films possess electrical conductivity close to that in the bulk at comparable doping, they exhibit considerably smaller thermopower. The data are consistent with loss of phonon drag. At neck distances between 120 -230 nm, the power factor at optimal doping is ∼ 50 percent that of the bulk. These insights are useful in the practical design of future thermoelectric devices based on nanostructured silicon.

Dynamic Thermal Management in SOI Transistors Using Holey Silicon-Based Thermoelectric Cooling

“…According to spectral scaling model [18], [34], a 20 nm neck size, 30 µm thickness, and 30% porosity of holey silicon result in an in-plane thermal conductivity of 1 W/mK and a cross-plane thermal conductivity of 13 W/mK. Previous thermal conductivity measurement of holey silicon also supports these values [24], [27]. P-type single-crystal silicon with a doping concentration of 2.5 × 10 19 cm −3 is assumed in this model, providing an electrical conductivity of 2.52 × 10 4 S/m and a Seebeck coefficient of 440 µV/K in bulk silicon, as is experimentally reported in literature [35], [36], [37].…”

“…While significant advancements have been made in enhancing the ZT value through nanostructuring [21] and controlled doping [22], most conventional thermoelectric materials are not compatible with microelectronic manufacturing processes. However, holey silicon stands out as one of the few candidates that offers a unique combination of high thermoelectric performance (theoretical ZT ∼ 0.47 at 300 K) [23], [24], [25] and excellent compatibility with the bipolar-CMOS-DMOS (BCD) technology. Experimental results and analytical models have demonstrated that the holey silicon thin film, possessing optimal neck size, and porosity, exhibits not only low in-plane thermal conductivity (1-10 W/mK at 300 K) but also high electrical conductivity and Seebeck coefficient inherited from bulk silicon [18], [23], [24], [25], [26], [27].…”

Thermoelectric characterization of crystalline nano-patterned silicon membranes

“…In addition to our data, the graph also displays information on p-type nanostructured silicon. Specifically, it includes results from studies involving nanowires, 26,52 holey silicon, 32,[53][54][55] and ultrathin solid films. The presence of phonon drags near room temperature in membranes has provided an opportunity to Fig.…”

Fabrication of Metal Contacts on Silicon Nanopillars: The Role of Surface Termination and Defectivity

“…Since, in silicon, thermal conductivity is largely due to heat transported by long MFP phonons, this leads to a major κ reduction. An alternative strategy involves top-down control to generate nanopores in 'holey' silicon, reducing κ without adversely affecting the power factor [8,9].…”