Pattern Recognition Using Carbon Nanotube Synaptic Transistors with an Adjustable Weight Update Protocol

Kim, Sungho; Choi, Byoung Ho; Lim, Moojong; Yoon, Jinsu; Lee, Ju Hee; Kim, Hee‐Dong; Choi, Sung-Jin

doi:10.1021/acsnano.6b07894

Cited by 287 publications

(281 citation statements)

References 40 publications

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“…Using the multilevel characteristics of electronic synapses, grayscale image recognition can be easily realized . The learning processes are usually closely associated with A‐RS and D‐RS as well as their dynamic evolution.…”

Section: Resultsmentioning

confidence: 99%

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

et al. 2019

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Brain‐inspired memristive artificial neural networks (ANNs) have been identified as a promising technology for pattern recognition tasks. To optimize the performance of ANNs in various applications, a recognition system with tunable accuracy and speed is highly desirable. A single WO3−x‐based memristor is presented in which analog and digital resistive switching (A‐RS and D‐RS) coexist according to a selectively executed forming process. The A‐RS and D‐RS mechanisms can be attributed to the modulation of the Schottky barrier on the interface and the formation/rupture of conducting filaments inside the film, respectively. More importantly, a new analog–digital hybrid ANN is developed based on the coexistence of A‐RS and D‐RS in the WO3−x memristor, enabling tunable learning accuracy and speed in pattern recognition. The spike‐timing‐dependent plasticity learning rules, as a learning base for image pattern recognition, are demonstrated using A‐RS and D‐RS devices with obviously different fluctuations and rates of change. The learning accuracy/speed can be improved by increasing the proportion of A‐RS/D‐RS in the crossbar array. A convenient method is provided for selecting an optimized pattern recognition scheme to meet different application situations.

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Section: Resultsmentioning

confidence: 99%

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

et al. 2019

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“…[48] The collaborative contribution of the neuromodulator and neurons allows accelerated synaptic consolidation and conversion from shortto long-term memory. [49] In summary, we demonstrated a new artificial synaptic architecture by monolithically integrating a memristor and a barristor using phase-engineered 2D heterostructures. This behavior originates from the effective electric field across the WO 3-x layer strengthening as the Schottky barrier at the WSe 2 /graphene junction decreases, resulting in an increasing dynamic variation range of the PSC.…”

Section: Methodsmentioning

confidence: 96%

Synaptic Barristor Based on Phase‐Engineered 2D Heterostructures

et al. 2018

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The development of energy-efficient artificial synapses capable of manifoldly tuning synaptic activities can provide a significant breakthrough toward novel neuromorphic computing technology. Here, a new class of artificial synaptic architecture, a three-terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable-barrier tungsten selenide/graphene Schottky diode, termed as a 'synaptic barrister,' are reported. The device can implement essential synaptic characteristics, such as short-term plasticity, long-term plasticity, and paired-pulse facilitation. Owing to the electrostatically controlled barrier height in the ultrathin van der Waals heterostructure, the device exhibits gate-controlled memristive switching characteristics with tunable programming voltages of 0.2-0.5 V. Notably, by electrostatic tuning with a gate terminal, it can additionally regulate the degree and tuning rate of the synaptic weight independent of the programming impulses from source and drain terminals. Such gate tunability cannot be accomplished by previously reported synaptic devices such as memristors and synaptic transistors only mimicking the two-neuronal-based synapse. These capabilities eventually enable the accelerated consolidation and conversion of synaptic plasticity, functionally analogous to the synapse with an additional neuromodulator in biological neural networks.

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“…In the past few years, ionotronic transistors or memristors were proposed to mimic advanced neural functions. By connecting pressure sensors and oscilloscope with neuromorphic devices and adoping mathematical modeling and software simulation, advanced neural functions are simulated, including logic function, image memorization, pattern recognition, face recognition, classic conditioning, tactile‐perception system, etc. In this section, we shortly discuss these achievements.…”

Section: Advanced Neural Functions Based On Ionotronic Neuromorphic Dmentioning

confidence: 99%

Ionotronic Neuromorphic Devices for Bionic Neural Network Applications

Zhu

2019

Physica Rapid Research Ltrs

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The von Neumann bottleneck constrains developments of conventional artificial intelligences (AIs) toward portable, energy efficient, and truly brain‐like systems. Biological synapses connecting neurons deliver neural action potentials by regulating neurotransmitters between presynaptic and postsynaptic membranes. In a similar way, ionotronic transistors and memristors transmit electronic signals through the migration of ionic species in dielectric and resistive switching electrolyte under external electrical field. Thus, utilizing ionotronic devices to emulate synapses and building bionic neural networks opens up a brand‐new path to realize hardware‐based AI. Moreover, it would allow the fabrication of an artificial perception learning system to mimic the human perception system with multi‐sensory learning abilities. This review presents ionotronic devices for neuromorphic engineering applications. The operation mechanisms and brain‐inspired synaptic responses and neural functions are discussed. At last, outlooks for ionotronic devices to construct bionic neural networks are provided.

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Pattern Recognition Using Carbon Nanotube Synaptic Transistors with an Adjustable Weight Update Protocol

Cited by 287 publications

References 40 publications

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

Synaptic Barristor Based on Phase‐Engineered 2D Heterostructures

Ionotronic Neuromorphic Devices for Bionic Neural Network Applications

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