2010 28th VLSI Test Symposium (VTS) 2010
DOI: 10.1109/vts.2010.5469626
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Path clustering for adaptive test

Abstract: Adaptive test is one of the most efficient techniques that practically ensure high yield and reliability of designed chips. In this paper, a novel path-clustering method suitable for the adaptive test, in which test paths are altered according to the monitored process-parameters, is proposed. Considering the probability function of the die-to-die systematic process variation, the proposed method clusters path sets so that the total number of test-paths are minimized. For quantitative evaluation of different cl… Show more

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Cited by 10 publications
(15 citation statements)
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“…PREVIOUS WORK Uezono et al in [5] propose a Greedy algorithm for the clustering problem in Section II. The Greedy algorithm first generates M clusters of critical paths by defining C j = S j , then iteratively merges two clusters at a time until the total number of clusters is equal to k. In each iteration, the algorithm merges two clusters C i and C j with minimal distance (d i, j ) defined as…”
Section: Problem Formulationmentioning
confidence: 99%
See 3 more Smart Citations
“…PREVIOUS WORK Uezono et al in [5] propose a Greedy algorithm for the clustering problem in Section II. The Greedy algorithm first generates M clusters of critical paths by defining C j = S j , then iteratively merges two clusters at a time until the total number of clusters is equal to k. In each iteration, the algorithm merges two clusters C i and C j with minimal distance (d i, j ) defined as…”
Section: Problem Formulationmentioning
confidence: 99%
“…It differs from [2] in that the cost calculation is not defined by net "cuts", but rather by the number of nets in each cluster. 5 …”
Section: A Overview Of Our Algorithmmentioning
confidence: 99%
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“…For example, an adaptive substrate-bias control for each manufactured chip has been proposed to compensate for delay change resulting from threshold voltage variations [3]. In LSI testing, the idea of adaptive testing, in which a set of test paths is altered to apply the most suitable one for a chip, has been proposed [4]- [6]. Both of these techniques rely on the device-parameter estimations, such as threshold voltages of transistors, of an individual chip.…”
Section: Introductionmentioning
confidence: 99%