Passivated emitter and rear cell—Devices, technology, and modeling

Abstract

Current studies reveal the expectation that photovoltaic (PV) energy conversion will become the front-runner technology to stem against the extent of global warming by the middle of this century. In 2019, the passivated emitter and rear cell (PERC) design has taken over the majority of global photovoltaic solar cell production. The objective of this paper is to review the fundamental physics of the underlying cell architecture, its development over the past few decades to an industry main stream product, as well as an in-depth characterization of current cells and the future potential of the device structure. The early development of PERCs was set by an intriguing series of improvements starting in 1989 and resulting in a long-standing energy conversion efficiency record of 25.0% set up in 1999. It took a decade of intense technological development to implement this structure as an upgrade to existing production lines and another decade to increase the efficiency of industrially manufactured cells to over 22%. Our analysis of state-of-the-art large-area screen-printed PERCs is based on the pilot-line technology in the Photovoltaic Technology Evaluation Center at the Fraunhofer ISE, which is assumed to be representative of current state-of-the art cell processing. The main recent cell efficiency improvements have been achieved thanks to fine line metallization taking advantage of the high quality emitter formation and passivation and to improvements in material quality. In order to enhance the energy yield of the PV modules, innovations in interconnection technology like multibusbar and shingling technology as well as bifaciality are supported by PERC developments. Over the years, ongoing improvements have been made in the understanding of PERCs by analytical and numerical modeling of these devices. We show a study based on 3D numerical modeling and an extrapolation of the PERC device structure and technology to achieve an efficiency of 26%. This result surpasses earlier investigations due to the combination of technology components, as further improved front contact and emitter design as well as rear passivation and mirrors. We expect that PERCs can also play a strong role at the bottom of multijunction solar cells and will defend a strong position in global PV production beyond the end of the now starting decade.

Industrial High Throughput Emitter Formation and Thermal Oxidation for Silicon Solar Cells by the High Temperature Stack Oxidation Approach

“…In addition, the growing thermal dioxide layer provides the surface passivation of the emitter within the same process. In comparison with the conventionally used thermal oxidation at moderate temperature between 600 and 800 C, [2,8,9] the high temperature 850 C < T < 900 C of the stack oxidation process is necessary for the further in-diffusion and the redistribution of the dopants.…”

“…In this work, we fabricated two types of PERC devices using the process sequences shown in Figure 2. Group 1 represents the fabrication following the HiTSOx approach, whereas group 2 represents the reference process at Fraunhofer ISE according to the study by Preu et al [2] For both groups, p-type (boron-doped) Czochralski-grown silicon wafers (Cz-Si) in M2 format (resistivity ρ b % 0.8 Ωcm) serve as starting material. After alkaline texturing, the emitter diffusion takes place in a tube furnace using POCl 3 as liquid dopant precursor.…”

“…The passivated emitter and rear cell (PERC) [1,2] is the dominating technology in the global market and its market share will remain high in the next years. [3] In addition, a significant increase in the production tool throughput is predicted with up to 12 000 wafers per hour for thermal processes.…”

“…[3] The process sequence for PERC solar cells usually contains two high temperature steps, the emitter formation in a tube furnace from a gas phase using phosphorus oxychloride (POCl 3 ) as liquid dopant precursor and the subsequent thermal oxidation or annealing, also in a tube furnace, serving mostly for surface passivation. [2] Thereby, diffusion and oxidation processes account for 11% of the total PERC cell production cost. [4] Years ago, the diffusion process at atmospheric pressure (AP) was replaced by low pressure (LP) processing to increase the throughput to typically 1200 wafer per process.…”

Influence of Polysilicon Thickness on Properties of Screen‐Printed Silver Paste Metallized Silicon Oxide/Polysilicon Passivated Contacts

“…These cells can have efficiencies in the range of 22-22.7% in mass production, but they suffer from recombination losses, specifically at the metalsemiconductor interface. [1,2] A way of mitigating these losses is to utilize a passivating layer stack consisting of doped polysilicon and an interfacial oxide. Contrary to a low-temperature passivation architecture with amorphous silicon layers, a polysilicon-based passivation approach is suitable for industrial back-end processing with screen-printed firing through pastes.…”