Partitioning and Scheduling Resolution Problems by Bees Mating Strategy in Dres’ Systems

Abstract

In last years, several approaches have been proposed for solving the Hardware/Software partitioning and scheduling problem in dynamically reconfigurable embedded systems (DRESs), directed by metaheuristic algorithms. Honey Bees Mating Optimization (HBMO) algorithm is one of these advanced methods. It is a nature inspired algorithm which simulates the process of real honey-bees mating. In this work, we propose a variant of the Honey-bee Mating Optimization Algorithm for solving Hardware/software (HW/SW) partitioning and scheduling problems in DRESs. The algorithm is used in a hybrid scheme with other metaheuristic algorithms for successfully solving these problems. More precisely, the proposed algorithm (HBMO_ DRESs) combines a Honey Bees Mating Optimization (HBMO) algorithm, the Tabu Search (TS) and Simulated Annealing (SA)). From an acyclic task graph and a set of Area-Time implementation trade off points for each task, the adopted method performs HW/SW partitioning and scheduling such that the global application execution time is minimized. Comparing the proposed method with Genetic Algorithm and Evolutionary Strategies (ES), the simulation results show that the proposed algorithm has better convergence performance.

A Modified Binary Firefly Algorithm to Solve Hardware/Software Partitioning Problem

“…For our study, similar to the analysis methods in [47,54,59,65,66,67], the instances of all metrics to be employed in the experiments, are generated randomly. The values of software execution time (Ti Sw ), hardware execution time (Ti Hw ), and hardware area occupied (Ai Hw ) were generated randomly, as in [47,54,59,65,66,67].…”

“…For our study, similar to the analysis methods in [47,54,59,65,66,67], the instances of all metrics to be employed in the experiments, are generated randomly. The values of software execution time (Ti Sw ), hardware execution time (Ti Hw ), and hardware area occupied (Ai Hw ) were generated randomly, as in [47,54,59,65,66,67]. For example, [65] used random values for the two metrics area and hardware execution time generated respectively in [0, 100] and [0, 60] to validate their results.…”

“…Some design-quality attributes which must perfectly describe the solution are used to measure the validity of the solution. Most works, in literature, were proposed to study the Hw/Sw partitioning problem with three metrics, execution time, hardware area, and communication cost [3,58,59,60]. Other approaches have also added to different cost metrics the power consumption and software memory usage [42,61,62,63].…”