Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays

Fortes, J.A.B.

doi:10.1109/tc.1986.1676652

Cited by 432 publications

(116 citation statements)

References 7 publications

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“…The Locally Parallel-Globally Sequential (LPGS) [29] and Locally SequentialGlobally Parallel (LSGP) [30] algorithms are two techniques that, from a schedule for an unbounded number of clusters, remap the solutions to a bounded number of clusters. In LSGP, clusters are partitioned into blocks, each block being assigned to one cluster (locally sequential).…”

Section: Cluster Regrouping On Physical Processorsmentioning

confidence: 99%

Parallelizing with BDSC, a resource-constrained scheduling algorithm for shared and distributed memory systems

Khaldi¹,

Jouvelot²,

Ancourt³

2015

Parallel Computing

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We introduce a new parallelization framework for scientific computing based on BDSC, an efficient automatic scheduling algorithm for parallel programs in the presence of resource constraints on the number of processors and their local memory size. BDSC extends Yang and Gerasoulis's Dominant Sequence Clustering (DSC) algorithm; it uses sophisticated cost models and addresses both shared and distributed parallel memory architectures. We describe BDSC, its integration within the PIPS compiler infrastructure and its application to the parallelization of four well-known scientific applications: Harris, ABF, equake and IS. Our experiments suggest that BDSC's focus on efficient resource management leads to significant parallelization speedups on both shared and distributed memory systems, improving upon DSC results, as shown by the comparison of the sequential and parallelized versions of these four applications running on both OpenMP and MPI frameworks.

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Section: Cluster Regrouping On Physical Processorsmentioning

confidence: 99%

Parallelizing with BDSC, a resource-constrained scheduling algorithm for shared and distributed memory systems

Khaldi¹,

Jouvelot²,

Ancourt³

2015

Parallel Computing

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“…This technique is the well-known Locally Parallel Globally Sequential (LPGS) scheme used in the synthesis of fixed-size systolic arrays [21]. Each tile is executed in parallel on the FPGA and tiles are processed in sequence.…”

Section: Lpgs Tilingmentioning

confidence: 99%

Automatic mapping of nested loops to FPGAS

Bondhugula

Ramanujam

Sadayappan

2007

Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

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This paper present a framework for automatic mapping of perfectly nested loops with constant dependences onto regular processor arrays, suitable for direct implementation on Field Programmable Gate Arrays (FPGAs). The problem is modeled as that of finding a suitable completion procedure for a full-rank linear transformation on the iteration space. The approach enables extraction of necessary degrees of communication-free and pipelined parallelism to optimize performance under the resource constraints of limited logic resources and I/O bandwidth available on an FPGA. The generation of control signals for the custom processing elements is also addressed. Examples of automatic derivation of parallel designs for some common nested loops are provided. Experimental results on the Cray XD1 show that an FPGA-based matrix-multiplication design obtained using the framework attains significant speedup on the XD1's attached FPGA, when compared to execution on the XD1 CPU.

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“…There is an enormous literature on this problem (see e.g. 3,8,14,15,21,23,24,26,30]). Customarily, the simulation problem is formalized as the emdedding problem of one graph in another (for a formal de nition of the embedding problem, see Section 2).…”

Section: Introductionmentioning

confidence: 99%

Improved Compressions of Cube-Connected Cycles Networks

Klasing

1998

Graph-Theoretic Concepts in Computer Science

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We present a new technique for the embedding of large cube-connected cycles networks (CCC) into smaller ones, a problem that arises when algorithms designed for an architecture of an ideal size are to be executed on an existing architecture of a xed size. Using the new embedding strategy, we show that the CCC of dimension l can be embedded into the CCC of dimension k with dilation 1 and optimum load for any k; l 2 IN, k 8, such that 5 3 + c k < l k 2, c k = 4k + 3 3 2 2=3k , thus improving known results. Our embedding technique also leads to improved dilation 1 embeddings in the case 3 2 < l k 5 3 + c k .

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Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays

Cited by 432 publications

References 7 publications

Parallelizing with BDSC, a resource-constrained scheduling algorithm for shared and distributed memory systems

Parallelizing with BDSC, a resource-constrained scheduling algorithm for shared and distributed memory systems

Automatic mapping of nested loops to FPGAS

Improved Compressions of Cube-Connected Cycles Networks

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