Partition refinement in real-time model checking

Spelberg, R.F. Lutje; Toetenel, Hans; Ammerlaan, M.J.J.

doi:10.1007/bfb0055344

Cited by 28 publications

(12 citation statements)

References 14 publications

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“…Tools such as Uppaal [14], Kronos [6], and PMC [15] are now routinely used for industrial case studies. A disadvantage of the traditional approaches is, however, that they can only be used to verify concrete timing properties: one has to provide the values of all timing parameters that occur in the system.…”

Section: Introductionmentioning

confidence: 99%

Linear Parametric Model Checking of Timed Automata

Hune¹,

Romijn²,

Stoelinga³

et al. 2001

BRICS

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Abstract. We present an extension of the model checker Uppaal capable of synthesize linear parameter constraints for the correctness of parametric timed automata. The symbolic representation of the (parametric) state-space is shown to be correct. A second contribution of this paper is the identification of a subclass of parametric timed automata (L/U automata), for which the emptiness problem is decidable, contrary to the full class where it is know to be undecidable. Also we present a number of lemmas enabling the verification effort to be reduced for L/U automata in some cases. We illustrate our approach by deriving linear parameter constraints for a number of well-known case studies from the literature (exhibiting a flaw in a published paper).

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Section: Introductionmentioning

confidence: 99%

Linear Parametric Model Checking of Timed Automata

Hune¹,

Romijn²,

Stoelinga³

et al. 2001

BRICS

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“…Another approach [19] suggests using a partition refinement algorithm for efficient model checking. However, the reported running times are still exponential.…”

Section: Related Workmentioning

confidence: 99%

Difference Decision Diagrams

Møller

Lichtenberg

Andersen

et al. 1999

Computer Science Logic

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“…In this article we propose a variant PDT of predicate diagrams, intended for the verification of real-time systems. We also show how to relate PDTs to real-time systems described as extended timed-automata graphs (XTGs), a formalism that combines timed automata and constraints for modeling infinite data domains [22,6]. Basically, a PDT shows a finite-state abstraction of an XTG, and the correctness of the abstraction can be established by proving a number of verification conditions expressed in first-order logic.…”

Section: Introductionmentioning

confidence: 99%

Predicate diagrams for the verification of real-time systems

Kang

Merz

2007

Form. Asp. Comput.

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This article discusses a new format of predicate diagrams for the verification of real-time systems. We consider systems that are defined as extended timed graphs, a format that combines timed automata and constructs for modelling data, possibly over infinite domains. Predicate diagrams are succinct and intuitive representations of Boolean abstractions. They also represent an interface between deductive tools used to establish the correctness of an abstraction, and model checking tools that can verify behavioral properties of finite-state models. The contribution of this article is to extend the format of predicate diagrams to timed systems. We establish a set of verification conditions that are sufficient to prove that a given predicate diagram is a correct abstraction of an extended timed graph; these verification conditions can often be discharged with SMT solvers such as CVC-lite. Additionally, we describe how this approach extends naturally to the verification of parameterized systems. The formalism is supported by a toolkit, and we demonstrate its use at the hand of Fischer's real-time mutual-exclusion protocol.

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Partition refinement in real-time model checking

Cited by 28 publications

References 14 publications

Linear Parametric Model Checking of Timed Automata

Linear Parametric Model Checking of Timed Automata

Difference Decision Diagrams

Predicate diagrams for the verification of real-time systems

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