PaRSEC: Exploiting Heterogeneity to Enhance Scalability

Bosilca, George; Bouteiller, Aurélien; Danalis, Anthony; Faverge, Mathieu; Hérault, Thomas; Dongarra, Jack

doi:10.1109/mcse.2013.98

Cited by 240 publications

(155 citation statements)

References 6 publications

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“…Recently, in order to cope with resource heterogeneity and enable performance portability, the use of dynamic runtime schedulers have been proposed, such as StarPU [1], StarSs [2], QUARK [17] or PaRSEC [3]. Applications are described as a set of tasks, whose dependencies can be automatically deduced from access to shared data with the STF model [1], or explicitly specified [3].…”

Section: Related Workmentioning

confidence: 99%

“…Applications are described as a set of tasks, whose dependencies can be automatically deduced from access to shared data with the STF model [1], or explicitly specified [3]. At runtime, the scheduler takes the scheduling and allocation decisions based on the set of ready tasks (tasks whose data and control dependences have all been resolved), on the availability of the resources (estimated using expected processing and communication times), and on the actual location of input data.…”

Section: Related Workmentioning

confidence: 99%

“…Adapting these distributions to heterogeneous settings is actually a hard algorithmic and technical challenge. However, to cope with the increasing heterogeneity of the architectures, task-based runtime systems (such as StarPU [1], StarSs [2], ParSEC [3], and others) are currently proposed, with the goal of enabling better performance portability for applications across different architectures. To this end, such runtime systems provide an efficient separation of the numerical computation from the associated scheduling and resource allocation decisions.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Eyraud-Dubois¹,

Lambert

2018

Proceedings of the 47th International Conference on Parallel Processing

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We consider the problem of data allocation when performing matrix multiplication on a heterogeneous node, with multicores and GPUs. Classical (cyclic) allocations designed for homogeneous settings are not appropriate, but the advent of task-based runtime systems makes it possible to use more general allocations. Previous theoretical work has proposed square and cube partitioning algorithms aimed at minimizing data movement for matrix multiplication. We propose techniques to adapt these continuous square partitionings to allocating discrete tiles of a matrix, and strategies to adapt the static allocation at runtime. We use these techniques in an implementation of Matrix Multiplication based on the StarPU runtime system, and we show through extensive experiments that this implementation allows to consistently obtain a lower communication volume while improving slightly the execution time, compared to standard state-of-the-art dynamic strategies.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Eyraud-Dubois¹,

Lambert

2018

Proceedings of the 47th International Conference on Parallel Processing

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show abstract

“…This is important because task-based runtime systems, such as PARSEC (Parallel Runtime Scheduling and Execution Controller) [8], [9], are become increasingly popular in the high performance computing community. The PARSEC framework is a task-based dataflowdriven system designed as a dynamic platform that can address the challenges posed by distributed heterogeneous hardware resources.…”

Section: B Parsecmentioning

confidence: 99%

“…Dataflow-based programming models, in contrast to the control flow model (e.g., as implemented in languages such as C), have become increasingly popular, especially on distributed heterogeneous architectures. Consequently, performance measurement tools for task-based dataflow-driven runtimes, like the Parallel Runtime Scheduling and Execution Controller (PARSEC) [8], [9], have become increasingly important. Our early prototyping work of the integration of PAPI into PARSEC has proven to be valuable as it allows hardware performance counter measurements at a finer granularity -more precisely, at true task granularity as opposed to thread/process granularity -providing a richer and more precise mapping between PAPI measurements and application behavior.…”

Section: Introductionmentioning

confidence: 99%

Power monitoring with PAPI for extreme scale architectures and dataflow-based programming models

McCraw

Ralph

Danalis

et al. 2014

2014 IEEE International Conference on Cluster Computing (CLUSTER)

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Abstract-For more than a decade, the PAPI performancemonitoring library has provided a clear, portable interface to the hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). Most major end-user tools that application developers use to analyze the performance of their applications rely on PAPI to gain access to these performance counters.One of the critical roadblocks on the way to larger, more complex high performance systems, has been widely identified as being the energy efficiency constraints. With modern extreme scale machines having hundreds of thousands of cores, the ability to reduce power consumption for each CPU at the software level becomes critically important, both for economic and environmental reasons. In order for PAPI to continue playing its well established role in HPC, it is pressing to provide valuable performance data that not only originates from within the processing cores but also delivers insight into the power consumption of the system as a whole.An extensive effort has been made to extend the Performance API to support power monitoring capabilities for various platforms. This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC -a task-based dataflow-driven execution engine -enabling hardware performance counter and power monitoring at true task granularity.

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Task‐based FMM for heterogeneous architectures

Agullo

Bramas

Coulaud

et al. 2015

Concurrency and Computation

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International audienceHigh performance fast multipole method is crucial for the numerical simulation of many physical problems. In a previous study, we have shown that task-based fast multipole method provides the flexibility required to process a wide spectrum of particle distributions efficiently on multicore architectures. In this paper, we now show how such an approach can be extended to fully exploit heterogeneous platforms. For that, we design highly tuned graphics processing unit (GPU) versions of the two dominant operators P2P and M2L) as well as a scheduling strategy that dynamically decides which proportion of subsequent tasks is processed on regular CPU cores and on GPU accelerators. We assess our method with the StarPU runtime system for executing the resulting task flow on an Intel X5650 Nehalem multicore processor possibly enhanced with one, two, or three Nvidia Fermi M2070 or M2090 GPUs (Santa Clara, CA, USA). A detailed experimental study on two 30 million particle distributions (a cube and an ellipsoid) shows that the resulting software consistently achieves high performance across architectures

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PaRSEC: Exploiting Heterogeneity to Enhance Scalability

Cited by 240 publications

References 6 publications

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Power monitoring with PAPI for extreme scale architectures and dataflow-based programming models

Task‐based FMM for heterogeneous architectures

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