PARDA: A Fast Parallel Reuse Distance Analysis Algorithm

Every physical machine in today's typical datacenter is backed by storage devices with hundreds of Gigabytes to Terabytes in size. Data center vendors usually use hard disk drives for their back-end storage as it is cheap and reliable. However, the increase in the I/O accesses to the back-end storage from one or many of the VMs hosted on a physical machine can reduce its overall accesses time significantly due to contention. This may not be suitable for interactive applications requiring low latency that might be co-located with other I/O intensive applications.In this paper we present Multi-Cache, a multi-layer cache management system that uses a combination of cache devices of varied speed and cost such as solid state drives, non-volatile memories, etc to mitigate this problem. Multi-Cache partitions each device dynamically at runtime according to the workload of each VM and its priority. We use a heuristic optimization technique that ensures maximum utilization of the caches resulting in a high hit rate.We use a weighted partitioning policy that improves latency by up to 72% for individual workloads, and a overall hit rate increase of up to 31% for host running several workloads together in comparison to standard LRU caching algorithms.

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“…Second, we want to calculate this quickly in real time. To achieve this we use the open source implementation of PARDA [21].…”

Section: A Long Term Behaviormentioning

confidence: 99%

“…In our work, we calculate the Reuse Distance values using the open source implementation of PARDA [21]. PARDA uses a hash table that maps a LBA to its most recent reference, and a splay tree that holds the values of the number of distinct locations referenced since this LBA's most recent reference.…”

Section: A Simulation Platform and Workload Analysismentioning

confidence: 99%

Multi-cache: Dynamic, Efficient Partitioning for Multi-tier Caches in Consolidated VM Environments

Rajasekaran

Duan

Zhang

et al. 2016

2016 IEEE International Conference on Cloud Engineering (IC2E)

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“…However, the tree based algorithm has high computing efficiency, because it is able to utilize some special properties of the tree to reduce the redundant traversal. In order to improve the speed of traversal data nodes in the tree, Niu et al [18] used a hash table to assist the data reuse distance calculation. Because the hash table must be constructed before calculating the data reuse distance, it will incur additional overhead in both time and space.…”

Section: Calculating Data Reuse Distancementioning

confidence: 99%

DagTM: An Energy-Efficient Threads Grouping Mapping for Many-Core Systems Based on Data Affinity

Dong

Chen

et al. 2016

Energies

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Many-core processors are becoming mainstream computing platforms nowadays. How to map the application threads to specific processing cores and exploit the abundant hardware parallelism of a many-core processor efficiently has become a pressing need. This work proposes a data affinity based threads grouping mapping strategy Data Affinity Grouping based Thread Mapping (DagTM), which categorizes threads into different groups according to their data affinity and the hardware architecture feature of many-core processors. After that, the thread groups are mapped to the specific processing cores to be energy efficiently executed. More specifically, first, the intra-thread data locality is analyzed by computing the data reuse distance, and the inter-thread data affinity is quantified by affinity matrix. Second, the threads are categorized into different groups via affinity subtree spanning algorithm. Finally, the thread groups are assigned to different processing cores through static binding. DagTM is able to reduce conflicts of the shared memory access and additional data transmission, increase utilization of the computing resources, and reduce entire system energy consumption. Experimental results show that DagTM obtains a nearly 14% improvement in computing performance, and a nearly 10% reduction in energy consumption compared with the traditional thread mapping mechanism under the condition of not introducing additional runtime overhead.

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“…This one is more efficient and effective than sequential TSP algorithm. The first parallel algorithm to compute perfect reuse distance for characterizing data cache locality proposed in [7].…”

Section: Literature Reviewmentioning

confidence: 99%

A Parallel Random Access Machine (PRAM) Model for English Language Recognizer (PRAM-ELR)

Pasha¹,

Feroze²,

Pasha³

2015

IJCA

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PARDA: A Fast Parallel Reuse Distance Analysis Algorithm

Cited by 59 publications

References 21 publications

Multi-cache: Dynamic, Efficient Partitioning for Multi-tier Caches in Consolidated VM Environments

Multi-cache: Dynamic, Efficient Partitioning for Multi-tier Caches in Consolidated VM Environments

DagTM: An Energy-Efficient Threads Grouping Mapping for Many-Core Systems Based on Data Affinity

A Parallel Random Access Machine (PRAM) Model for English Language Recognizer (PRAM-ELR)

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