Parametric study for warpage and stress reduction of variable bump types in fcFBGA

Hsieh, Ming-Che; Lee, Chien Chen; Hung, Li Chiun; Wang, Vincent; Perng, Harry

doi:10.1109/impact.2011.6117218

Cited by 7 publications

(2 citation statements)

References 6 publications

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“…To reduce LF bump stress, a larger SRO size and a smaller Cu pad diameter are recommended. The smallest bump stress (IMC on Cu pad) will occur in LF and Cu column bump devices when the ratio of Cu pad diameter and SRO size is designed to approach 1 [19], [20]. Moreover, the design for larger UBM size will also help having smaller UBM stress [19], [20].…”

Section: Comparisons and Discussionmentioning

confidence: 99%

“…The smallest bump stress (IMC on Cu pad) will occur in LF and Cu column bump devices when the ratio of Cu pad diameter and SRO size is designed to approach 1 [19], [20]. Moreover, the design for larger UBM size will also help having smaller UBM stress [19], [20]. Furthermore, it is also found that the stress in the UBM is the largest in a perpendicular BOL design, which means that the LF bump crack issue can be effectively reduced, but the UBM delamination problem remains an issue in perpendicular BOL devices.…”

Section: Comparisons and Discussionmentioning

confidence: 99%

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Comprehensive Thermomechanical Analyses and Validations for Various Cu Column Bumps in fcFBGA

Hsieh¹,

Lee²,

Hung³

2013

IEEE Trans. Compon., Packag. Manufact. Technol.

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Since the employment of copper (Cu) column bump (with lead-free solder cap) interconnect offers flexibility in the aspect ratio, increases the I/O density, and provides the characteristic of fine-pitch bumps in flip-chip technology (less than 150 µm bump pitch), a significant amount of research on Cu column bumps in flip-chip packages has been carried out in recent years. For the implementations of Cu column bumps, the architectures of bump-on-capture (BOC) pad with solder bump on pre-solder and bump-on-lead (BOL) with solder bump on Cu trace are usually adopted in flip-chip packages. For the purpose of realizing the mechanical behaviors for fcFBGA (flipchip fine-pitch ball grid array) with lead-free (LF) bump, Cu column bump, and Cu column bump without (w/o) LF solder cap (Cu column w/o solder cap), this paper presents 3-D finite element analysis (FEA) and compare their warpage and stress responses.The experimental coplanarity measurements for these three types of bumps in fcFBGA are carried out to validate the FEA results. Moreover, the reliability assessment for the underfill selection is further validated with an FEA study. Through validation and simulation, it is observed that the use of an LF bump was better at preventing extreme low-k (ELK) failure and aluminum (Al) pad/underbump metallurgy (UBM) delamination, while the use of Cu column bump with and without a solder cap can avoid presolder crack failure. In addition, because the packaging geometry and material always play important roles in determining mechanical behaviors, identifying the most significant factors that affect the stress and warpage responses is useful if stress and warpage reductions in fcFBGA are required. In order to gain the essential factors in fcFBGA, systematic simulation studies for LF bump, Cu column bump, and BOL are illustrated. The impact levels for the top significant factors that influence the ELK, UBM, and bump stresses as well as the warpage are obtained through systematic simulation studies. Several suggestions for reducing warpage and the critical stresses in fcFBGA with Cu column bumps are recommended. The results show that the stresses in ELK, UBM, and bump in the BOL structure are smaller than those in a BOC structure, demonstrating that the BOL structure provides a reliable fcFBGA package without any ELK damage, UBM delamination, or bump crack issues. The perpendicular BOL orientation in the corner bump area also prevents damage that can be caused by a Cu trace or LF bump. It is believed that the proposed results will provide design guidelines to enhance package reliability and reduce the package cost during the development stage.

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