Parallelized Architecture of Multiple Classifiers for Face Detection

Abstract

Abstract-This paper presents a parallelized architecture of multiple classifiers for face detection based on the Viola and Jones object detection method. This method makes use of the AdaBoost algorithm which identifies a sequence of Haar classifiers that indicate the presence of a face. We describe the hardware design techniques including image scaling, integral image generation, pipelined processing of classifiers, and parallel processing of multiple classifiers to accelerate the processing speed of the face detection system. Also we discuss the parallelized architecture which can be scalable for configurable device with variable resources. We implement the proposed architecture in Verilog HDL on a Xilinx Virtex-5 FPGA and show the parallelized architecture of multiple classifiers can have 3.3× performance gain over the architecture of a single classifier and an 84× performance gain over an equivalent software solution.

Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs

“…This particular implementation computed 3 features in parallel. Most recent highly parallelized versions can achieve up to 16.08 FPS [2] by calculating up to 8 feature classifiers in parallel. Table I compares all the designs.…”

“…Since the processing rate roughly scales linearly with number of image pixels, many of the rates would in fact be far lower if they could be applied to VGA images. For example, Cho et al [2] note that their design runs at 61.02 FPS for QVGA (320 × 240) image sizes. In this paper, we consider VGA image sizes, and take 16 FPS as the benchmark rate, as it is the highest achieved frame rate known to us for the Viola-Jones face detection algorithm [2].…”

“…For example, Cho et al [2] note that their design runs at 61.02 FPS for QVGA (320 × 240) image sizes. In this paper, we consider VGA image sizes, and take 16 FPS as the benchmark rate, as it is the highest achieved frame rate known to us for the Viola-Jones face detection algorithm [2]. Previous GPU implementations are unable to achieve comparable performance to this FPGA design with the fastest known solution to the best of our knowledge running the algorithm at 2.8 FPS for a single NVIDIA GTX 285 GPU and 4.3 FPS for 2 NVIDIA GTX 295 GPUs on VGA size images [4].…”

“…Design/Author Image Size FPS [5] Unknown 52.00 [6] 120 × 120 15.00 [7] 216 × 288 2.50 [8] 256 × 192 98.00 [9] 640 × 480 6.55 [2] 640 × 480 16.08 [4] 627 × 441 4.30 Table I PREVIOUS ACCELERATED VERSIONS OF VIOLA-JONE'S ALGORITHM A difficulty in comparing the designs in Table I is that not all the designs work with VGA images. Since the processing rate roughly scales linearly with number of image pixels, many of the rates would in fact be far lower if they could be applied to VGA images.…”

“…Reconfigurable devices, such as field programmable gate arrays (FPGAs), are more cost effective, since the designer may reconfigure the device in software yet still realize performance that approaches that of an ASIC. For example, the design by Cho et al realized a rate of 16 frames per second (FPS) for VGA (640 × 480) images [2]. However, even an FPGA design requires a significant engineering effort, due to the complexity of correctly synthesizing a register transfer level (RTL) design that meets area and timing constraints.…”