2017 IEEE 17th International Conference on Communication Technology (ICCT) 2017
DOI: 10.1109/icct.2017.8359659
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Parallelization method of digital signal processing based on multi-core pipeline

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“…Signal processing needs to be redesigned [ 18 ]. At the same time, most of the multi-channel signal processing designed by FPGA are simple channel superpositions, as shown in Figure 1 , which wastes a lot of resources [ 19 , 20 ]. Therefore, this method is not suitable for scenarios with limited edge resources.…”
Section: Introductionmentioning
confidence: 99%
“…Signal processing needs to be redesigned [ 18 ]. At the same time, most of the multi-channel signal processing designed by FPGA are simple channel superpositions, as shown in Figure 1 , which wastes a lot of resources [ 19 , 20 ]. Therefore, this method is not suitable for scenarios with limited edge resources.…”
Section: Introductionmentioning
confidence: 99%