“…Different computer architectures coupled with dedicated memory access strategies are used to accelerate the BP step of an analytic or iterative reconstruction, including: general purpose processors [5], [6], [7], graphical processors [8], [9], [10], [11], [12], [13], [14], the Cell processor [4], [15] or ASIC/FPGA architectures [16], [17], [18], [19], [20]. While most of these works have investigated cone beam BP, only a few of them have investigated 3D parallel beam BP [2], [5], [8], [9].…”