Parallel processing techniques for high performance image processing applications

Hemnani, Monika

doi:10.1109/sceecs.2016.7509316

Cited by 7 publications

(3 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…On the basis of Flynn"s classification for fast processing computers, computing hardware classified into 4 types i.e. SISD (Single Instruction Single Data), SIMD (Single Instruction Multiple Data), MISD (Multiple Instruction Single Data), MIMD (Multiple Instruction Multiple Data) depicted in Fig.1 [5,6]. Where, MISD have no practical (commercial use).…”

Section: Related Workmentioning

confidence: 99%

A Parallel Processing Technique Based on GMO and BCS for Medical Image Encryption

Singh*,

Singh,

Nath Rai

2020

IJITEE

View full text Add to dashboard Cite

Image encryption is a technique that provides security to an image and their data from unauthorized access in which there is the lightweight process (LWP) that can be parallelized resulting in the reduction of computation time. In this paper, parallel lossless image encryption, as well as the decryption technique, is proposed. The method is a parallel implementation of group modulo operation (GMO) based bit circular shift (BCS) of pixel bit-plane values. The backbone of this technique is circular bit rotation based on some modulo group key value. The key value used here is the result of group modulo operation. The binary bit values of pixels of the initial Image are rotated circularly to generate a new binary bit value of pixels encrypted image. The enhancement of this GMO and BCS based encryption are also given here by using the parallel implementation of the algorithm. The given results show the parallel implementation technique has the same level of encryption standard but has a better level of the time standard. As discussed in the result section, this technique can be used for medical image encryption as well as in multimedia applications where the transfer of image data is required over a network.

show abstract

Section: Related Workmentioning

confidence: 99%

A Parallel Processing Technique Based on GMO and BCS for Medical Image Encryption

Singh*,

Singh,

Nath Rai

2020

IJITEE

View full text Add to dashboard Cite

show abstract

“…These operations are processed in parallel for high-speed processing. Repeated arithmetic operations can be easily processed in parallel [13][14][15][16][17][18][19][20]. However, table-lookup coding operations are difficult to process in parallel [21][22][23].…”

Section: Introductionmentioning

confidence: 99%

Implementation of Floating‐Point Arithmetic Processing on Content Addressable Memory‐Based Massive‐ParallelSIMDmatriX Core

Kageyama

Arai

Hamano

et al. 2023

IEEJ Transactions Elec Engng

View full text Add to dashboard Cite

Several multimedia applications have recently been implemented on mobile devices, including digital image compression, video compression, and audio processing. Furthermore, Artificial Intelligence (AI) processing has grown in popularity, necessitating the execution of large amounts of data in mobile devices. Therefore, the processing core in a mobile device requires high performance, programmability, and versatility. Multimedia apps for mobile devices typically comprise repeated arithmetic and table‐lookup coding operations. A Content Addressable Memory‐based massive‐parallel SIMD matriX core (CAMX) is presented to increase the processing speed of both operations on a processing core. The CAMX serves as a CPU core accelerator for mobile devices. The CAMX supports high‐parallel processing and is equipped with two CAM modules for high‐speed repeated arithmetic and table‐lookup coding operations. The CAMX has great performance, programmability, and versatility on mobile devices because it can handle logical, arithmetic, search, and shift operations in parallel. This paper shows that the CAMX can process parallel repeated arithmetic and table‐lookup coding operations; single‐precision floating‐point arithmetic can calculate 1024 entries in 5613 clock cycles in parallel without embedding a dedicated floating‐point arithmetic unit. This clock cycle using two's complement‐reduced floating‐point addition implementation decreases 59% than the implementation of straight‐forward floating‐point addition. The implementation of straight‐forward floating‐point additions is improved as two's complement instruction reduced algorithms. Thus, this paper proposes an instruction reduction architecture by modulating the CAMX to directly access the data in the left and right CAM modules from the preserve register. The CAMX has achieved high performance, programmability, and versatility by not embedding a dedicated processing unit. Moreover, assuming the CAMX processes at an operating frequency of 0.1, 0.5, 1.0, or 1.5 GHz, it can process floating‐point additions above approximately 4500 parallelized data, with better performance than an ARM core using NEON and Vector Floating‐Point (VFP). In addition, related works executed by software instruction, dedicated floating‐point arithmetic unit, or both and the CAMX are compared while assuming the same operation frequency. From this result, the CAMX which has 128‐bit and 1024‐entry CAM modules achieves higher performance than the related works executed by only software instructions and by combining software instructions and a dedicated floating‐point arithmetic unit. © 2023 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

show abstract

“…The parallelization algorithm has to select the parts of parallel that contains it, and it makes the appropriateness between the speed of Parallel is characterized as the necessity in finding instructions, chain of instructions, or certain parts of the code that are executed with diverse cores or processors at the same time [1]. The parallelization of shared memory is utilized in various computer applications such as intrusion detection systems (IDS) [3], [4] linear algebra [5], string matching algorithms [6] bioinformatics [7], data mining [8], image classification [9], and Therapeutic picture preparing [10].…”

Section: Introductionmentioning

confidence: 99%

Parallel implementation of maximum-shift algorithm using OpenMp

Abdulrazzaq

Hamad

Taha

2021

IJEECS

View full text Add to dashboard Cite

String matching is considered as one of the center issues within the field of computer science, where there are numerous computer applications that supply the clients with string matching services. The increment within the number of databases which are created and protected in numerous computer gadgets had impacted researchers with the slant towards getting robust techniques in tending to this issue. In this study, the Maximum-Shift string matching algorithm is chosen to be executed with multi-core innovation through the utilization of OpenMP paradigm, in order to decrease the successive time, and increment the speedup and efficiency of the algorithm. The deoxyribonucleic acid (DNA), protein and the English text datasets are utilized to test the parallel execution that influences the Maximum-Shift algorithm execution when utilized with multi-core environment. The results demonstrated that the execution is affected by the performance between the parallel and consecutive execution of Maximum-Shift algorithm by data type. The English text appeared ideal comes about within the parallel execution time as compared to other datasets, whereas the DNA database set appeared the most elevated comes about when compared to other data types in terms of speedup and efficiency capabilities.

show abstract

Parallel processing techniques for high performance image processing applications

Cited by 7 publications

References 17 publications

A Parallel Processing Technique Based on GMO and BCS for Medical Image Encryption

A Parallel Processing Technique Based on GMO and BCS for Medical Image Encryption

Implementation of Floating‐Point Arithmetic Processing on Content Addressable Memory‐Based Massive‐ParallelSIMDmatriX Core

Parallel implementation of maximum-shift algorithm using OpenMp

Contact Info

Product

Resources

About