2006 IEEE International Conference on Acoustics Speed and Signal Processing Proceedings
DOI: 10.1109/icassp.2006.1659986
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Parallel LVCSR Algorithm for Cellphone-Oriented Multicore Processors

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Cited by 16 publications
(8 citation statements)
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“…The implementation statically mapped a carefully partitioned recognition network onto the multiprocessors, but the 3.8 × speed up was limited by runtime load imbalance, which would not scale to 30+ multiprocessors. The authors of [10] explored coarse-grained concurrency in large vocabulary conversational speech recognition (LVCSR) and implemented a pipeline of tasks on a cellphone-oriented multicore architecture. [19] proposed a parallel LVCSR implementation on a commodity multicore system using OpenMP.…”
Section: Related Workmentioning
confidence: 99%
“…The implementation statically mapped a carefully partitioned recognition network onto the multiprocessors, but the 3.8 × speed up was limited by runtime load imbalance, which would not scale to 30+ multiprocessors. The authors of [10] explored coarse-grained concurrency in large vocabulary conversational speech recognition (LVCSR) and implemented a pipeline of tasks on a cellphone-oriented multicore architecture. [19] proposed a parallel LVCSR implementation on a commodity multicore system using OpenMP.…”
Section: Related Workmentioning
confidence: 99%
“…Chong et al discusses opportunities that parallization of computationally intensive components can benefit the diarization applications [22]. Many speech and speaker recognition applications have already already seen performance benefits from parallelization [8], [9], [10], [11], [12] on parallel CPU and GPU platforms.…”
Section: Related Workmentioning
confidence: 99%
“…Modern GPUs can be programmed with languages such as CUDA [6] and OpenCL [7], which are intended to be used to speed up general-purpose and scientific applications. Many speech recognition and diarization applications have already seen tremendous speedups from being mapped onto parallel processors [8], [9], [10], [11], [12], [13], [14].…”
Section: Introductionmentioning
confidence: 99%
“…In [5], Ishikawa et al implemented a parallel speech recognition system in a cellphone using a 3-core processor. The system was divided in 3 steps, one for each core.…”
Section: Introductionmentioning
confidence: 99%