Parallel Genetic Algorithms on Multiple FPGAs

Guo, Liucheng; Funie, Andreea Ingrid; Thomas, David B.; Fu, Haohuan; Luk, Wayne

doi:10.1145/2927964.2927980

Cited by 16 publications

(9 citation statements)

References 11 publications

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“…Since most of the existing hardware implementations are complete GA algorithm [9,11,12], they reported the quality of solutions and the search speed as performance metrics, so, there is no crossover performance evaluation individually and independently. Whereas detailed information of crossover module is presented only in Reference [5], therefore, we can only compare our simulation results with the reported results of that work.…”

Section: Experimental Results and Comparisonmentioning

confidence: 99%

“…The proposed GA processor in Reference [8] has three methods of crossover including one-point, two-point, and uniform crossovers. A parallel GA system on four Virtex-6 FPGA is proposed in Reference [9]. Since the selection, crossover and mutation operators deal with two individuals sequentially to generate a new offspring, these operators are combined in a unit to increase the performance.…”

Section: Existing Work In Hardware Implementation Of Crossover Modulementioning

confidence: 99%

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FPGA Implementation of Crossover Module of Genetic Algorithm

Attarmoghaddam

Kanan

2019

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This paper proposes a hardware realization of the crossover module in the genetic algorithm for the travelling salesman problem (TSP). In order to enhance performance, we employ a combination of pipelining and parallelization with a genetic algorithm (GA) processor to improve processing speed, as compared to software implementation. Simulation results showed that the proposed architecture is six times faster than the similar existing architecture. The presented field-programmable gate array (FPGA) implementation of PMX crossover operator is more than 400 times faster than in software.

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Section: Experimental Results and Comparisonmentioning

confidence: 99%

Section: Existing Work In Hardware Implementation Of Crossover Modulementioning

confidence: 99%

FPGA Implementation of Crossover Module of Genetic Algorithm

Attarmoghaddam

Kanan

2019

Information

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“…Lastly, [19] and [20] presented parallel and distributed implementation of GA using FPGAs. [19] proposed a solution for parallel genetic algorithms in multiple FPGAs.…”

Section: Related Workmentioning

confidence: 99%

High-Performance Parallel Implementation of Genetic Algorithm on FPGA

Torquato

Fernandes

2019

Circuits Syst Signal Process

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Genetic Algorithms (GAs) are used to solve search and optimization problems in which an optimal solution can be found using an iterative process with probabilistic and non-deterministic transitions. However, depending on the problem's nature, the time required to find a solution can be high in sequential machines due to the computational complexity of genetic algorithms. This work proposes a parallel implementation of a genetic algorithm on field-programmable gate array (FPGA). Optimization of the system's processing time is the main goal of this project. Results associated with the processing time and area occupancy (on FPGA) for various population sizes are analyzed. Studies concerning the accuracy of the GA response for the optimization of two variables functions were also evaluated for the hardware implementation. However, the high-performance implementation proposes in this paper is able to work with more variable from some adjustments on hardware architecture.

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“…Function 11 (F11) is a well-known benchmark [13] to test the performance of Genetic algorithm (GA). A detailed parallel GA kernel design on FPGA can refer to [14]. Experimental Strategy We run our scheduling architecture and compare the performance with a FIFO approach and our implementation of HEFT and MFIT on both multiple RTM workloads and the parallel-GA benchmark, F11.…”

Section: Software Architecture and Experimental Setupmentioning

confidence: 99%

Lattice-Based Scheduling for Multi-FPGA Systems

Bao

Stillwell

et al. 2018

2018 International Conference on Field-Programmable Technology (FPT)

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Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.

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Parallel Genetic Algorithms on Multiple FPGAs

Cited by 16 publications

References 11 publications

FPGA Implementation of Crossover Module of Genetic Algorithm

FPGA Implementation of Crossover Module of Genetic Algorithm

High-Performance Parallel Implementation of Genetic Algorithm on FPGA

Lattice-Based Scheduling for Multi-FPGA Systems

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