Parallel border tracking in binary images using GPUs

Abstract

Border tracking in binary images is an important kernel for many applications. There are very efficient sequential algorithms, most notably, the algorithm proposed by Suzuki et al., which has been implemented for CPUs in well-known libraries. However, under some circumstances, it would be advantageous to perform the border tracking in GPUs as efficiently as possible. In this paper, we propose a parallel version of the Suzuki algorithm that is designed to be executed in GPUs and implemented in CUDA. The proposed algorithm is based on splitting the image into small rectangles. Then, a thread is launched for each rectangle, which tracks the borders in its associated rectangle. The final step is to perform the connection of the borders belonging to several rectangles. The parallel algorithm has been compared with a state-of-the-art sequential CPU version, using two different CPUs and two different GPUs for the evaluation. The computing times obtained show that in these experiments with the GPUs and CPUs that we had available, the proposed parallel algorithm running in the fastest GPU is more than 10 times faster than the sequential CPU routine running in the fastest CPU.

Algorithms to Speed up Contour Tracing in Real Time Image Processing Systems

“…In [28], Garcia et al, presented a modification of the Suzuki algorithm for parallel contour tracing on GPUs. The Suzuki algorithm is also based on the Moore neighbour tracing algorithm.…”

“…For performance analysis, we have designed a methodology to implement our algorithms using the NVIDIA GPUs used in [28], [30]. The pre-processed image (after greyscaling and thresholding respectively) is stored in the global memory of the GPU.…”

“…We have compared our implementation with parallel processing implementations of Garcia-Molla et al, [28] and Zhou et al, [30]. Garcia-Molla et al, have used Server 1 with a Tesla K40c GPU card and Server 2 with an Nvidia Quadro RTX 5000 for CUDA based implementation.…”

“…Time comparison between the performance of our methodology and the existing parallel processing methodologies by Garcia-Molla et al,[28] and Zhou et al,[30].…”

Compression-Based Optimizations for Out-of-Core GPU Stencil Computation

“…Stencil computation updates every element in given arrays (i.e., datasets) according to one or more fixed calculating patterns (i.e., stencils), which is an embarrassingly parallelizable task for graphics processing units (GPUs). A GPU has thousands of cores and its memory bandwidth is 5-10 times higher than that of a CPU, thus excelling at accelerating both compute-and memoryintensive scientific applications [6][7][8]. However, as a GPU has a limited capacity of device memory (tens of GBs), it fails to directly run a large stencil code whose data size exceeds the memory capacity.…”