2008 10th IEEE International Conference on High Performance Computing and Communications 2008
DOI: 10.1109/hpcc.2008.85
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Parallel Algorithm Design and Performance Evaluation of FDTD on 3 Different Architectures: Cluster, Homogeneous Multicore and Cell/B.E.

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Cited by 4 publications
(6 citation statements)
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“…In [36,37], we parallelized FDTD on Cell BE and compared the results with a shared memory architecture and a cluster of distributed memory multicores. Cell BE achieved a speedup of 14.14 over AMD Athlon and 7.05 over AMD Opteron at the processor chip level.…”
Section: Introductionmentioning
confidence: 99%
“…In [36,37], we parallelized FDTD on Cell BE and compared the results with a shared memory architecture and a cluster of distributed memory multicores. Cell BE achieved a speedup of 14.14 over AMD Athlon and 7.05 over AMD Opteron at the processor chip level.…”
Section: Introductionmentioning
confidence: 99%
“…However, the analysis region size has remained limited by the local store capacity. M. Xu et al [8], [9] implemented the two-dimensional FDTD method on the IBM Blade QS20 (3.2 GHz) and reported computation speed that is 14.14 times that of an Opteron (AMD Inc.) processor and 7.05 times that of an Opteron processor. The analysis region was allocated to the main memory, which was used as shared memory.…”
Section: Introductionmentioning
confidence: 99%
“…Cell BE processor is architected for multimedia applications with regular processing requirements. However, Cell BE shows significant speedups even for the problems with nonuniform memory access [14,15]. GAs are well known for their large memory requirements and non-uniform memory access patterns.…”
Section: Introductionmentioning
confidence: 99%