PAI-FCNN: FPGA Based Inference System for Complex CNN Models

Xia, Lixue; Diao, Lansong; Zhao, Jiang; Liang, Huixin; Chen, Kai; Ding, Li; Dou, Shunli; Su, Zibin; Sun, Meng; Zhang, Jiansong; Lin, Wei

doi:10.1109/asap.2019.00-21

Cited by 7 publications

(4 citation statements)

References 15 publications

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“…After that, the employees of China State Shipbuilding Corporation conducted in-depth research on the GUI automated testing technology of embedded software and proposed a nonintrusive embedded GUI automated testing framework [8,9]. Others proposed testing based on the characteristics of ship embedded software [10]. Scholars studied the UML-based embedded software test case generation technology [11].…”

Section: Related Workmentioning

confidence: 99%

Design and Implementation of Embedded Real-Time English Speech Recognition System Based on Big Data Analysis

Jin

Tsai

2021

Mathematical Problems in Engineering

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This article uses Field Programmable Gate Array (FPGA) as a carrier and uses IP core to form a System on Programmable Chip (SOPC) English speech recognition system. The SOPC system uses a modular hardware system design method. Except for the independent development of the hardware acceleration module and its control module, the other modules are implemented by software or IP provided by Xilinx development tools. Hardware acceleration IP adopts a top-down design method, provides parallel operation of multiple operation components, and uses pipeline technology, which speeds up data operation, so that only one operation cycle is required to obtain an operation result. In terms of recognition algorithm, a more effective training algorithm is proposed, Genetic Continuous Hidden Markov Model (GA_CHMM), which uses genetic algorithm to directly train CHMM model. It is to find the optimal model by encoding the parameter values of the CHMM and performing operations such as selection, crossover, and mutation according to the fitness function. The optimal parameter value after decoding corresponds to the CHMM model, and then the English speech recognition is performed through the CHMM algorithm. This algorithm can save a lot of training time, thereby improving the recognition rate and speed. This paper studies the optimization of embedded system software. By studying the fixed-point software algorithm and the optimization of system storage space, the real-time response speed of the system has been reduced from about 10 seconds to an average of 220 milliseconds. Through the optimization of the CHMM algorithm, the real-time performance of the system is improved again, and the average time to complete the recognition is significantly shortened. At the same time, the system can achieve a recognition rate of over 90% when the English speech vocabulary is less than 200.

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Section: Related Workmentioning

confidence: 99%

Design and Implementation of Embedded Real-Time English Speech Recognition System Based on Big Data Analysis

Jin

Tsai

2021

Mathematical Problems in Engineering

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“…Liu et al inferred the 256 × 256 images at 1.79 FPS/W. PAI-FCNN [22], DT-CNN [21], and RED [24] accelerated zero padding deconvolution by hardware, and took approaches to skip the operation of zero activation. PAI-FCNN accelerated a 3-bit weight, an 8-bit activation network with FPGA and inferred 300 × 300 images at 10.1 frames per second per watt (FPS/W).…”

Section: Related Workmentioning

confidence: 99%

“…Also, since all PEs operate on the same input feature map, zero-skipped feature map can be processed in parallel in all PEs, and workloads of PEs are balanced. There have been studies that skip the zero activation operations of zero padding deconvolution, as described above in II-D [21], [22], [38], [39]. GANAX [39] changed the dataflows on the 2-D systolic array to skip the operation of zero activations.…”

Section: B Zero-aware Binarized Deconvolutionmentioning

confidence: 99%