Packaged Monolithic Silicon 112-Gb/s Coherent Receiver

Abstract

Using a Si photonic integrated circuit and separate SiGe transimpedance amplifiers, we created a high-performance dual-polarization, dual-quadrature coherent receiver. It requires only 16.3-dB optical signal-to-noise ratio to receive a 112-Gb/s polarization-division-multiplexed quadrature phase-shift keying signal at a bit-error rate.

A 40-GBd QPSK/16-QAM Integrated Silicon Coherent Receiver

“…Apart from the decoupling capacitors, the TIAs also provide the biasing for the Ge PDs. The input stage of the TIA delivers a fixed voltage of 0.9 V across the bottom photodiode and a variable bias control output is set to 1.8 V, matching the voltage of the top photodiode to 0.9 V. This scheme has the benefit that it requires no negative supply voltage as in classic balanced configurations [5,7]. Moreover, all electrical connections with the PIC are provided by the electronic IC.…”

“…Furthermore, the high indexcontrast permits the realization of devices with very small footprint. Silicon ICRs with symbol rates up to 30 GBaud for QPSK and 28 GBaud for 16-QAM have been demonstrated using a single polarization receiver [4,5] and using a polarization division multiplexed (PDM) receiver [6][7][8][9]. An alternative implementation with a 120° optical hybrid using a 3x3 multimode-interferometer (MMI) instead of the traditional 90° hybrid was demonstrated in [10].…”

Dual Photonic Generation Ultrawideband Impulse Radio by Frequency Shifting in Remote-Connectivity Fiber

“…Each Monte Carlo simulation involved the transmission of 2 24 symbols, guaranteeing a penalty resolution of ' AE0:08 dB with a 95% probability [27]. Áf 3 dB is set to 50 GHz, whereas B res is set to 12.5 GHz (0.1 nm), which agrees with the OSNR's resolution bandwidth employed in previous experimental demonstrations [5], [28].…”

Wide dynamic range transimpedance amplifier IC for 100-G DP-QPSK optical links using 1-µm InP HBTs

“…These requirements are originated from the unique receiver architecture of 100-G DP-QPSK systems, in which the TIAs' analog output are digitized by analog-to-digital converters (ADCs) and then processed in digital domain by digital signal processors (DSPs) [2]. So far, some TIA ICs for 100-G DP-QPSK systems have been reported in the literature using InP HBTs [4] (our previous work), and SiGe BiCMOS [5,6]. However, these reports describe only a few IC performances such as gain and THD, and externally controllable functions are not included [4,5] or not explicitly shown [6].…”

“…So far, some TIA ICs for 100-G DP-QPSK systems have been reported in the literature using InP HBTs [4] (our previous work), and SiGe BiCMOS [5,6]. However, these reports describe only a few IC performances such as gain and THD, and externally controllable functions are not included [4,5] or not explicitly shown [6]. This paper reports 100-G DP-QPSK TIA IC with wide a dynamic-range (0.2∼2 mAppd input dynamic-range), good linearity (less than 3.3-% THD), and externally controllable functions (output amplitude adjustment, output shutdown, and auto/manual gain control switching).…”