P and B doped Si resonant interband tunnel diodes with as-grown negative differential resistance

Abstract

Robust Si resonant interband tunnel diodes have been designed and tested that demonstrate as-grown negative differential resistance at room temperature with peak-to-valley current ratios (PVCR) up to 2.5 and peak current densities in the order of 1 kA/cm 2 . The as-grown Si p þ in þ structures were synthesised using solid source molecular beam epitaxy, incorporating B and P d-doped layers. Both structures have shown thermal stability after 1 min post-growth anneals up through 6758C and the PVCR improves to 2.8 for a 5758C 1 min anneal.Introduction: A driving force in electronic device research has been increased functionality and density with reduced energy losses. One of the techniques proposed for meeting these goals has been the employment of tunnel diodes integrated with conventional transistors to form compact and low-power memory, logic and mixed-signal circuits. Considerable progress has been made in the area of Si-based resonant interband tunnel diodes (RITDs). Discrete RITDs have been reported that have a peak-to-valley current ratio (PVCR) greater than 6 [1], peak current densities (PCD) greater than 218 kA/cm 2 [2], and voltage swings, V s , greater than 560 mV [3]. All of these devices have features in common: 1) the electron tunnelling occurs between bound states in the valence band and the conduction band created by highlydoped layers formed by d-doping; 2) a spacer layer between the two d-doped layers which includes Si 1-x Ge x to reduce the bandgap and reduce the out-diffusion of dopants from the B d-doped layer; 3) epitaxial growth at low temperature to reduce both the diffusion of dopants and the segregation of constituents during the growth; and 4) a post-growth anneal to reduce the effect of point defects which occur due to the low temperature epitaxial growth.In particular, room temperature RITD performance has been shown to be sensitive to Ge concentration [4], the width of the spacer layer [5] and to the temperature of the post-growth anneal [1,3,4]. In spite of the narrow process windows, SiGe RITDs have been successfully integrated with both complementary metal oxide semiconductor (CMOS) transistors [6] and heterojunction bipolar transistors (HBT) [7] to form elementary logic circuits. The ease of integration of the RITD would be enhanced if they could be fabricated using only Si, without the added complication of the critical thickness constraints and residual strain of SiGe spacers or the requirement of post-growth anneal. In this Letter, we report the formation of discrete Si RITDs that are designed and fabricated so that neither a Ge alloy layer nor a post-growth anneal is required to obtain a Si tunnel diode suitable for integration. In addition, the thermal stability of the Si-RITDs are investigated in the temperature interval 500 to 6758C, since the devices may be exposed to these temperatures during integrated circuit fabrication, such as the formation of ohmic contacts.

Boron Delta-Doping Dependence on Si/SiGe Resonant Interband Tunneling Diodes Grown by Chemical Vapor Deposition

“…Postgrowth annealing was determined to be unnecessary for CVD-grown RITDs, unlike their MBE grown counterparts, due to the higher growth temperatures employed resulting in fewer vacancy defects [21]. It is recognized that some reports of MBE-grown RITDs without postgrowth annealing have been disclosed [14], [18], but annealing always improves an MBE grown diode, regardless of its as-grown performance. All measurements presented have been performed on 18-μm dots and were performed on pieces from the center of the 200-mm wafers.…”

“…A pure Si RITD, avoiding the complexity of Ge incorporation, resulted in a PVCR of 2.05 [17]. More recently, a Si-only RITD with a PVCR of 2.48 and J p of 1.5 kA/cm 2 , without requiring postgrowth anneal, has been reported [18]. Current densities can be tuned with the RITD for specific applications by varying the tunneling barrier thickness, resulting in seven orders of magnitude variation of current densities from 218 to 20 mA/cm 2 for barrier thicknesses ranging from 2.5 to 16 nm [19], [20].…”

Si/SiGe Resonant Interband Tunneling Diodes Incorporating $\delta$-Doping Layers Grown by Chemical Vapor Deposition

“…Past Si/SiGe RITD device results using the LT-MBE technique have shown that although postgrowth annealing may not be necessary to achieve room-temperature NDR, in all cases reported to date, the PVCR always increased with annealing [15]- [19], although a recent report demonstrated PVCR in excess of two for as-grown RITDs [19].…”

Evaluation of MOBILE-based gate-level pipelining augmenting CMOS with RTDs

“…It has been also reported a RITD with a cutoff frequency of 20GHz, allowing for the first time, applications of mixed signal, RF and high speed logic circuits [6] . Simpler and compatible with CMOS process to fabricate Tunneling Diodes have been recently reported: structures that do not need Ge [7] , and a fabrication process based on CVD (Chemical Vapor Deposition) instead of MBE [8] (Molecular Beam Epitaxy) is presented. Another explored option is the development of procedures for III-V RTDs compatible with silicon substrates.…”