Overcoming the GPU memory limitation on FDTD through the use of overlapping subgrids

Mattes, Leonardo; Kofuji, Sérgio Takeo

doi:10.1109/icmmt.2010.5524901

Cited by 12 publications

(8 citation statements)

References 5 publications

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“…In order to reduce the communication cost between CPU and GPU side, temporal blocking method, where each sub-domain is computed for multiple time steps at once without frequent communication, has been introduced [5], [6], [7] as shown in Figure 4. We name TBS as the number of time steps computed at once on the GPU side.…”

Section: A Naive Methods and Temporal Blocking Methodsmentioning

confidence: 99%

“…So, it has to copy current sub-domain back to CPU side and copy the next sub-domain to GPU side to continue which cause frequent communication between CPU and GPU. There is temporal blocking method [5], [6], [7], [8] which can solve this frequent communication problem. It has been utilized to improve cache locality [9], [10], [11] and to reduce the number of inter process communication [12].…”

Section: Introductionmentioning

confidence: 99%

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Efficient utilization of memory hierarchy to enable the computation on bigger domains for stencil computation in CPU-GPU based systems

Jin

Lin

Endo

2014

2014 International Conference on High Performance Computing and Applications (ICHPCA)

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The problem size of the stencil computation is limited by the memory capacity CPU, which is typically smaller than that of CPU memory in CPU-CPU based super computers.To enable bigger domain computation while maintaining high performance, this paper proposes and evaluates optimization methods for stencil computation by efficient utilization of the memory hierarchy in those systems. It uses temporal blocking method to enable bigger domain computation on CPU. Then, it uses buffer-copy method to solve redundancy problem of temporal blocking method. To solve the space consumption problem of buffer-copy method on CPU side, it sets buffer on the CPU side. Evaluation of stencil simulation on 3D domain shows that our new method for 7-point and 13-point stencils achieves good performance which is 1.22 times and 1.28 times higher than other methods on average.

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Section: A Naive Methods and Temporal Blocking Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Efficient utilization of memory hierarchy to enable the computation on bigger domains for stencil computation in CPU-GPU based systems

Jin

Lin

Endo

2014

2014 International Conference on High Performance Computing and Applications (ICHPCA)

View full text Add to dashboard Cite

show abstract

“…There are many recent works such as [12][13][14][15][16] that use GPUs to accelerate FDTD. GPU acceleration of 2-D and 3-D FDTD for electromagnetic field analysis is proposed in [12,13], respectively.…”

Section: The Fdtd Simulation Of Cylindrical Resonatormentioning

confidence: 99%

FDTD Acceleration for Cylindrical Resonator Design Based on the Hybrid of Single and Double Precision Floating-Point Computation

Waidyasooriya

Hariyama

Takei

et al. 2014

Journal of Computational Engineering

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Acceleration of FDTD (finite-difference time-domain) is very important for the fields such as computational electromagnetic simulation. We consider the FDTD simulation model of cylindrical resonator design that requires double precision floating-point and cannot be done using single precision. Conventional FDTD acceleration methods have a common problem of memorybandwidth limitation due to the large amount of parallel data access. To overcome this problem, we propose a hybrid of single and double precision floating-point computation method that reduces the data-transfer amount. We analyze the characteristics of the FDTD simulation to find out when we can use single precision instead of double precision. According to the experimental results, we achieved over 15 times of speed-up compared to the CPU single-core implementation and over 1.52 times of speed-up compared to the conventional GPU-based implementation.

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“…This vector wraps both modulus (speed) and phase (direction) in a single value reducing and reduce the rise of directional errors for small velocities. Since the vector is self-normalized, the angle between the measured velocity v e and the correct one v c is given by Equation (12). This error measurement is calculated for every pixel for which a velocity measurement was recovered.…”

Section: Multi-criteria Motivation For Tunning Mcgmmentioning

confidence: 99%

“…To solve this problem, research [12] has often proposed a data reuse alternative with the aim of minimizing the memory traffic between GPU and CPU. Another approach in the field of rendering meshes can be found in [13] a solution that uses more efficient algorithms in terms of memory consumption alongside other techniques based on simplification or information compression.…”

Section: Introductionmentioning

confidence: 99%

Multi-GPU based on multicriteria optimization for motion estimation system

Garcı́a

Botella

Ayuso

et al. 2013

EURASIP J. Adv. Signal Process.

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Graphics processor units (GPUs) offer high performance and power efficiency for a large number of data-parallel applications. Previous research has shown that a GPU-based version of a neuromorphic motion estimation algorithm can achieve a ×32 speedup using these devices. However, the memory consumption creates a bottleneck due to the expansive tree of signal processing operations performed. In the present contribution, an improvement in memory reduction was carried out, which limited accelerator viability usage. An evolutionary algorithm was used to find the best configuration. It supposes a trade-off solution between consumption resources, parallel efficiency, and accuracy. A multilevel parallel scheme was exploited: grain level by means of multi-GPU systems, and a finer level by data parallelism. In order to achieve a more relevant analysis, some optical flow benchmarks were used to validate this study. Satisfactory results opened the chance of building an intelligent motion estimation system that auto-adapted according to real-time, resource consumption, and accuracy requirements.

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Overcoming the GPU memory limitation on FDTD through the use of overlapping subgrids

Cited by 12 publications

References 5 publications

Efficient utilization of memory hierarchy to enable the computation on bigger domains for stencil computation in CPU-GPU based systems

Efficient utilization of memory hierarchy to enable the computation on bigger domains for stencil computation in CPU-GPU based systems

FDTD Acceleration for Cylindrical Resonator Design Based on the Hybrid of Single and Double Precision Floating-Point Computation

Multi-GPU based on multicriteria optimization for motion estimation system

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