OSR-Lite: Fast and deadlock-free NoC reconfiguration framework

Abstract

Abstract-Current and future on-chip networks will feature an enhanced degree of reconfigurability. Power management and virtualization strategies as well as the need to survive to the progressive onset of wear-out faults are root causes for that. In all these cases, a non-intrusive and efficient reconfiguration method is needed to allow the network to function uninterruptedly over the course of the reconfiguration process while remaining deadlock-free. This paper is inspired by the overlapped static reconfiguration (OSR) protocol developed for off-chip networks. However, in its native form its implementation in NoCs is outof-reach. Therefore, we provide a careful engineering of the NoC switch architecture and of the system-level infrastructure to support a cost-effective, complete and transparent reconfiguration process. Performance during the reconfiguration process is not affected and implementation costs (critical path and area overhead) are proved to be fully affordable for a constrained system. Less than 250 cycles are needed for the reconfiguration process of an 8x8 2D mesh with marginal impact on system performance.

Brisk and limited-impact NoC routing reconfiguration

“…The affected number of routers increases slowly with network size, showing that BLINC localizes the fault manifestation to a small region. Compared to existing methods [1,20], BLINC achieves more than 80% reduction in the number of affected routers, across a wide range of fault densities. Reconfiguration latency.…”

“…Although both solutions claim fast reconfiguration and uninterrupted operation, they do not provide evidence supporting their claims. In the on-chip networks domain, OSR-Lite [20] proposes a fast reconfiguration solution utilizing resources to support two routing-computation logic sets based on [16], with only one of them active at a time. Upon a fault occurrence, a central manager calculates the new replacement routes, while the old ones are still in use, then the two are swapped.…”

“…While OSR-Lite is reported to be faster than hardware solutions, the dedicated central manager is a single-point of failure. [21] improves [20] with a disconnection-rescuing algorithm, but it still misses potential connections due to its limited routing capability. [7] proposes a time/space-efficient reconfigurable routing algorithm, but it does not show its applicability to fault tolerance.…”

“…Our proposed solution, BLINC, is very fast and provides high tolerance against a wide range of faults. [1] on-chip hardware global fast high MD [5] on-chip hardware local very fast low Sem-Jacobsen et al [18] off-chip software local slow high OSR-Lite [20,21] on-chip software global moderate moderate III. BLINC RECONFIGURATION The main objective of our technique is to promptly find alternative routes for packets affected by a network topology change, due to a fault or other event.…”

A Brief Comment on “A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs” [ACM Transactions on Embedded Computing Systems 12 (2013) Article 106]

“…This is due as these configurations require changing the location of some routing restrictions, which is deadlock-prone. The mechanism proposed in [Strano et al 2012] can be used to avoid deadlocks. Figure 3 shows the most complex case for F14, which involves a reconfiguration process to avoid deadlock.…”