Origin of the low-frequency noise in n-channel FinFETs

Theodorou, Christoforos; Fasarakis, N.; Hoffman, T.; Chiarella, T.; Ghibaudo, G.; Dimitriadis, C. A.

doi:10.1016/j.sse.2013.01.009

Cited by 20 publications

(14 citation statements)

References 20 publications

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“…It is also clearly observed due to the spectral deformations for all devices, which indicated that the g-r process of the deep-level traps in the GaN buffer layer is existed. From the cutoff frequency f o in Figure 4, the trap time constant (τ i ) can be calculated using the following Equation (2) [11].…”

Section: Resultsmentioning

confidence: 99%

Effects of GaN Buffer Resistance on the Device Performances of AlGaN/GaN HEMTs

Lee

Choi

et al. 2020

Crystals

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We investigated the effects of GaN buffer resistance of AlGaN/GaN high-electron-mobility transistors (HEMTs) on direct current (DC), low-frequency noise (LFN), and pulsed I-V characterization performances. The devices with the highest GaN buffer resistance were grown on sapphire substrate using two-step growth temperature method without additional compensation doping. The proposed device exhibited the degraded off-state leakage current due to the improved GaN buffer quality compared to the reference devices with relative low buffer resistance, which is confirmed by high resolution X-ray diffraction (HRXRD). However, the proposed device with deep-level defects in GaN buffer layer showed the reduced hysteresis (∆Vth), increased breakdown voltage (BV), and enhanced pulse I-V characteristics. Regardless of GaN buffer resistance, all devices clearly showed 1/f behavior with carrier number fluctuations (CNF) at on-state but followed 1/f2 characteristic at off-state. From the 1/f2 noise characteristics, the extracted trap time constant (τi) of the proposed device can be obtained to be 10 ms, which is shorter than those of the reference devices because of the full compensation of deep-level defects in the GaN buffer layer.

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Section: Resultsmentioning

confidence: 99%

Effects of GaN Buffer Resistance on the Device Performances of AlGaN/GaN HEMTs

Lee

Choi

et al. 2020

Crystals

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“…Tri-gate (TG) fin-shaped field-effect transistors (FinFETs) are promising device structures for sub-30 nm scaling of MOSFETs as a result of their immunity to short-channel effects. The impact of the fin width on the LFN has been investigated in long-channel and short-channel n-channel FinFETs [29]. The normalized flicker noise components at frequency 10 Hz is presented in Figure 13.…”

Section: C-finfets/tri-gate Mosfetsmentioning

confidence: 99%

Modeling of low‐frequency noise in advanced CMOS devices

Ghibaudo

Jomaah

2015

Int J Numerical Modelling

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The modeling and characterization of low-frequency noise and noise variability in various regimes of operation are investigated for the main advanced complementary metal-oxide semiconductor (CMOS) technologies. Novel materials and innovative device architectures from 0.5 μm to 20 nm gate lengths are studied. The impact of gate stack, realized with ultrathin oxides, polysilicon gate and high-k/metal gate is analyzed. The influence of alternative channel materials, in particular ultrathin body silicon-on-insulator layers, strain Si and III-V materials is addressed. The comparison of low-frequency noise in advanced device architectures, including bulk Si, fully depleted SOI, FinFET, junctionless, and multi-gates structures, is shown. Accurate noise models, taking into account the main physical mechanisms, are proposed for all these very advanced technologies, which will be needed for the nanoelectronics of the next decade.

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“…Redistribution subject to ECS terms of use (see 138.251.14. 35 Downloaded on 2015-03-10 to IP obvious. The devices with mainly flicker noise exhibit now an inverse correlation with μ n , which has been frequently seen in the past for other types of MOSFETs.…”

Section: Gr Noise and Noise Variabilitymentioning

confidence: 99%

“…Redistribution subject to ECS terms of use (see 138.251.14. 35 Downloaded on 2015-03-10 to IP SOI transistors, where it is hard to bias the opposite interface in accumulation.…”

Section: Random Telegraph Noise and Deep-level Spectroscopymentioning

confidence: 99%

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Low-Frequency Noise Studies on Fully Depleted UTBOX Silicon-on-Insulator nMOSFETs: Challenges and Opportunities

Simoen

Aoulaiche

Santos

et al. 2013

ECS J. Solid State Sci. Technol.

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The low-frequency (LF) noise behavior of Fully Depleted (FD) Ultra-Thin Buried Oxide (UTBOX) Silicon-on-Insulator (SOI) nMOSFETs is described from the perspective of the three major noise sources: 1/f-like or flicker noise, associated with carrier trapping/detrapping in the gate oxide; Generation-Recombination (GR) noise due to processing-induced defects in the thin silicon film and single-oxide-trap-related Random Telegraph Noise (RTN). It is shown that the fully depleted nature of the thin silicon films (<20 nm) offers the unique opportunity to study and demonstrate the front-back coupling of the 1/f noise. At the same time, a large variability is induced in the noise power spectral density by the presence of Lorentzian noise, related with GR events through defects in the silicon film. A method to discriminate oxide-from film-defects-related Lorentzian noise is pointed out. Finally, the implications for future fully depleted fin-type of devices will also be addressed.

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Origin of the low-frequency noise in n-channel FinFETs

Cited by 20 publications

References 20 publications

Effects of GaN Buffer Resistance on the Device Performances of AlGaN/GaN HEMTs

Effects of GaN Buffer Resistance on the Device Performances of AlGaN/GaN HEMTs

Modeling of low‐frequency noise in advanced CMOS devices

Low-Frequency Noise Studies on Fully Depleted UTBOX Silicon-on-Insulator nMOSFETs: Challenges and Opportunities

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